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makefile: Add TARGET variable for final output file name

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This commit is contained in:
Alexander Heldt
2024-07-28 11:14:51 +02:00
parent cc8380759b
commit d23cb54d58
1 changed files with 3 additions and 2 deletions
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5
Makefile
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@@ -21,6 +21,7 @@ LDFLAGS = -T link.ld -nostartfiles -nostdlib --specs nano.specs -lc -lgcc -Wl,--
SRC_DIR = src SRC_DIR = src
BUILD_DIR = build BUILD_DIR = build
TARGET = final
SRC_FILES := $(wildcard $(SRC_DIR)/*.c) SRC_FILES := $(wildcard $(SRC_DIR)/*.c)
PREP_FILES := $(patsubst $(SRC_DIR)/%.c,$(BUILD_DIR)/%.i,$(SRC_FILES)) PREP_FILES := $(patsubst $(SRC_DIR)/%.c,$(BUILD_DIR)/%.i,$(SRC_FILES))
@@ -28,9 +29,9 @@ ASM_FILES := $(patsubst $(BUILD_DIR)/%.i,$(BUILD_DIR)/%.S,$(PREP_FILES))
OBJ_FILES := $(patsubst $(BUILD_DIR)/%.S,$(BUILD_DIR)/%.o,$(ASM_FILES)) OBJ_FILES := $(patsubst $(BUILD_DIR)/%.S,$(BUILD_DIR)/%.o,$(ASM_FILES))
.PHONY: build .PHONY: build
build: builddir preprocess compile assemble $(BUILD_DIR)/final.elf build: builddir preprocess compile assemble $(BUILD_DIR)/$(TARGET).elf
$(BUILD_DIR)/final.elf: $(OBJ_FILES) $(BUILD_DIR)/$(TARGET).elf: $(OBJ_FILES)
$(CC) $(LDFLAGS) $^ -o $@ $(CC) $(LDFLAGS) $^ -o $@
$(BUILD_DIR)/%.i: $(SRC_DIR)/%.c $(BUILD_DIR)/%.i: $(SRC_DIR)/%.c