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wip working usart and receive, but wrong baud rate. also 0kb flash reported; programmer broken?

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This commit is contained in:
Alexander Heldt
2024-12-26 21:55:47 +01:00
parent 592717d900
commit 21df1010bf
7 changed files with 125 additions and 126 deletions
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BIN
build/final.elf
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60
build/final.elf.map
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@@ -157,7 +157,7 @@ LOAD build/usart.o
0x08000000 interrupt_vector_table 0x08000000 interrupt_vector_table
0x08000198 . = ALIGN (0x4) 0x08000198 . = ALIGN (0x4)
.text 0x08000198 0x4f0 .text 0x08000198 0x4e4
0x08000198 . = ALIGN (0x4) 0x08000198 . = ALIGN (0x4)
*(.text) *(.text)
*(.text.*) *(.text.*)
@@ -254,44 +254,44 @@ LOAD build/usart.o
0x080004e4 0x20 build/timer.o 0x080004e4 0x20 build/timer.o
0x080004e4 tim4_start 0x080004e4 tim4_start
.text.usart2_init .text.usart2_init
0x08000504 0xf8 build/usart.o 0x08000504 0xec build/usart.o
0x08000504 usart2_init 0x08000504 usart2_init
.text.usart2_start .text.usart2_start
0x080005fc 0x20 build/usart.o 0x080005f0 0x20 build/usart.o
0x080005fc usart2_start 0x080005f0 usart2_start
.text.usart2_write_byte .text.usart2_write_byte
0x0800061c 0x30 build/usart.o 0x08000610 0x30 build/usart.o
0x0800061c usart2_write_byte 0x08000610 usart2_write_byte
.text.usart2_write .text.usart2_write
0x0800064c 0x2a build/usart.o 0x08000640 0x2a build/usart.o
0x0800064c usart2_write 0x08000640 usart2_write
*(.rodata) *(.rodata)
*fill* 0x08000676 0x2 *fill* 0x0800066a 0x2
.rodata 0x08000678 0xe build/main.o .rodata 0x0800066c 0xe build/main.o
*(.rodata.*) *(.rodata.*)
0x08000688 . = ALIGN (0x4) 0x0800067c . = ALIGN (0x4)
*fill* 0x08000686 0x2 *fill* 0x0800067a 0x2
0x08000688 _data_addr = LOADADDR (.data) 0x0800067c _data_addr = LOADADDR (.data)
.glue_7 0x08000688 0x0 .glue_7 0x0800067c 0x0
.glue_7 0x08000688 0x0 linker stubs .glue_7 0x0800067c 0x0 linker stubs
.glue_7t 0x08000688 0x0 .glue_7t 0x0800067c 0x0
.glue_7t 0x08000688 0x0 linker stubs .glue_7t 0x0800067c 0x0 linker stubs
.vfp11_veneer 0x08000688 0x0 .vfp11_veneer 0x0800067c 0x0
.vfp11_veneer 0x08000688 0x0 linker stubs .vfp11_veneer 0x0800067c 0x0 linker stubs
.v4_bx 0x08000688 0x0 .v4_bx 0x0800067c 0x0
.v4_bx 0x08000688 0x0 linker stubs .v4_bx 0x0800067c 0x0 linker stubs
.iplt 0x08000688 0x0 .iplt 0x0800067c 0x0
.iplt 0x08000688 0x0 build/main.o .iplt 0x0800067c 0x0 build/main.o
.rel.dyn 0x08000688 0x0 .rel.dyn 0x0800067c 0x0
.rel.iplt 0x08000688 0x0 build/main.o .rel.iplt 0x0800067c 0x0 build/main.o
.data 0x20000000 0x0 load address 0x08000688 .data 0x20000000 0x0 load address 0x0800067c
0x20000000 . = ALIGN (0x4) 0x20000000 . = ALIGN (0x4)
0x20000000 _data_start = . 0x20000000 _data_start = .
*(.data) *(.data)
@@ -299,10 +299,10 @@ LOAD build/usart.o
0x20000000 . = ALIGN (0x4) 0x20000000 . = ALIGN (0x4)
0x20000000 _data_end = . 0x20000000 _data_end = .
.igot.plt 0x20000000 0x0 load address 0x08000688 .igot.plt 0x20000000 0x0 load address 0x0800067c
.igot.plt 0x20000000 0x0 build/main.o .igot.plt 0x20000000 0x0 build/main.o
.bss 0x20000000 0x0 load address 0x08000688 .bss 0x20000000 0x0 load address 0x0800067c
0x20000000 . = ALIGN (0x4) 0x20000000 . = ALIGN (0x4)
0x20000000 _bss_start = . 0x20000000 _bss_start = .
*(.bss) *(.bss)
@@ -381,12 +381,12 @@ LOAD linker stubs
.debug_macro 0x00003cb3 0xb74 build/usart.o .debug_macro 0x00003cb3 0xb74 build/usart.o
.debug_macro 0x00004827 0x82 build/usart.o .debug_macro 0x00004827 0x82 build/usart.o
.debug_line 0x00000000 0x666 .debug_line 0x00000000 0x661
.debug_line 0x00000000 0x116 build/gpio.o .debug_line 0x00000000 0x116 build/gpio.o
.debug_line 0x00000116 0x1e4 build/main.o .debug_line 0x00000116 0x1e4 build/main.o
.debug_line 0x000002fa 0xea build/startup.o .debug_line 0x000002fa 0xea build/startup.o
.debug_line 0x000003e4 0xdf build/timer.o .debug_line 0x000003e4 0xdf build/timer.o
.debug_line 0x000004c3 0x1a3 build/usart.o .debug_line 0x000004c3 0x19e build/usart.o
.debug_str 0x00000000 0x63e6 .debug_str 0x00000000 0x63e6
.debug_str 0x00000000 0x5508 build/gpio.o .debug_str 0x00000000 0x5508 build/gpio.o

97
build/usart.S
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@@ -121,56 +121,49 @@ usart2_init:
.loc 1 28 41 .loc 1 28 41
movs r2, #0 movs r2, #0
str r2, [r3, #20] str r2, [r3, #20]
.loc 1 50 35
ldr r3, .L2+8
ldr r3, [r3, #12]
ldr r2, .L2+8
.loc 1 50 41
orr r3, r3, #32768
str r3, [r2, #12]
.loc 1 52 35
ldr r3, .L2+8
ldr r3, [r3, #8]
ldr r2, .L2+8
.loc 1 52 41
bic r3, r3, #65280
bic r3, r3, #240
str r3, [r2, #8]
.loc 1 53 35
ldr r3, .L2+8
ldr r3, [r3, #8]
ldr r2, .L2+8
.loc 1 53 41
orr r3, r3, #832
str r3, [r2, #8]
.loc 1 54 35 .loc 1 54 35
ldr r3, .L2+8 ldr r3, .L2+8
ldr r3, [r3, #8] ldr r3, [r3, #8]
ldr r2, .L2+8 ldr r2, .L2+8
.loc 1 54 41 .loc 1 54 41
bic r3, r3, #7 bic r3, r3, #65280
bic r3, r3, #240
str r3, [r2, #8] str r3, [r2, #8]
.loc 1 55 35 .loc 1 55 35
ldr r3, .L2+8 ldr r3, .L2+8
ldr r2, .L2+8
ldr r3, [r3, #8] ldr r3, [r3, #8]
ldr r2, .L2+8
.loc 1 55 41 .loc 1 55 41
orr r3, r3, #832
str r3, [r2, #8] str r3, [r2, #8]
.loc 1 58 35 .loc 1 58 35
ldr r3, .L2+8 ldr r3, .L2+8
ldr r3, [r3, #12] ldr r3, [r3, #8]
ldr r2, .L2+8 ldr r2, .L2+8
.loc 1 58 41 .loc 1 58 41
orr r3, r3, #8 bic r3, r3, #7
str r3, [r2, #12] str r3, [r2, #8]
.loc 1 59 35 .loc 1 59 35
ldr r3, .L2+8 ldr r3, .L2+8
ldr r2, .L2+8
ldr r3, [r3, #8]
.loc 1 59 41
str r3, [r2, #8]
.loc 1 62 35
ldr r3, .L2+8
ldr r3, [r3, #12] ldr r3, [r3, #12]
ldr r2, .L2+8 ldr r2, .L2+8
.loc 1 59 41 .loc 1 62 41
orr r3, r3, #8
str r3, [r2, #12]
.loc 1 63 35
ldr r3, .L2+8
ldr r3, [r3, #12]
ldr r2, .L2+8
.loc 1 63 41
orr r3, r3, #4 orr r3, r3, #4
str r3, [r2, #12] str r3, [r2, #12]
.loc 1 60 1 .loc 1 64 1
nop nop
mov sp, r7 mov sp, r7
.cfi_def_cfa_register 13 .cfi_def_cfa_register 13
@@ -197,7 +190,7 @@ usart2_init:
.type usart2_start, %function .type usart2_start, %function
usart2_start: usart2_start:
.LFB1: .LFB1:
.loc 1 62 25 .loc 1 66 25
.cfi_startproc .cfi_startproc
@ args = 0, pretend = 0, frame = 0 @ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0 @ frame_needed = 1, uses_anonymous_args = 0
@@ -207,14 +200,14 @@ usart2_start:
.cfi_offset 7, -4 .cfi_offset 7, -4
add r7, sp, #0 add r7, sp, #0
.cfi_def_cfa_register 7 .cfi_def_cfa_register 7
.loc 1 63 35 .loc 1 67 35
ldr r3, .L5 ldr r3, .L5
ldr r3, [r3, #12] ldr r3, [r3, #12]
ldr r2, .L5 ldr r2, .L5
.loc 1 63 41 .loc 1 67 41
orr r3, r3, #8192 orr r3, r3, #8192
str r3, [r2, #12] str r3, [r2, #12]
.loc 1 64 1 .loc 1 68 1
nop nop
mov sp, r7 mov sp, r7
.cfi_def_cfa_register 13 .cfi_def_cfa_register 13
@@ -239,7 +232,7 @@ usart2_start:
.type usart2_write_byte, %function .type usart2_write_byte, %function
usart2_write_byte: usart2_write_byte:
.LFB2: .LFB2:
.loc 1 66 35 .loc 1 70 35
.cfi_startproc .cfi_startproc
@ args = 0, pretend = 0, frame = 8 @ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0 @ frame_needed = 1, uses_anonymous_args = 0
@@ -253,23 +246,23 @@ usart2_write_byte:
.cfi_def_cfa_register 7 .cfi_def_cfa_register 7
mov r3, r0 mov r3, r0
strb r3, [r7, #7] strb r3, [r7, #7]
.loc 1 68 35 .loc 1 72 35
ldr r2, .L9 ldr r2, .L9
.loc 1 68 40 .loc 1 72 40
ldrb r3, [r7, #7] @ zero_extendqisi2 ldrb r3, [r7, #7] @ zero_extendqisi2
str r3, [r2, #4] str r3, [r2, #4]
.loc 1 71 9 .loc 1 75 9
nop nop
.L8: .L8:
.loc 1 71 43 discriminator 1 .loc 1 75 43 discriminator 1
ldr r3, .L9 ldr r3, .L9
ldr r3, [r3] ldr r3, [r3]
.loc 1 71 48 discriminator 1 .loc 1 75 48 discriminator 1
and r3, r3, #128 and r3, r3, #128
.loc 1 71 60 discriminator 1 .loc 1 75 60 discriminator 1
cmp r3, #0 cmp r3, #0
beq .L8 beq .L8
.loc 1 73 1 .loc 1 77 1
nop nop
nop nop
adds r7, r7, #12 adds r7, r7, #12
@@ -297,7 +290,7 @@ usart2_write_byte:
.type usart2_write, %function .type usart2_write, %function
usart2_write: usart2_write:
.LFB3: .LFB3:
.loc 1 75 30 .loc 1 79 30
.cfi_startproc .cfi_startproc
@ args = 0, pretend = 0, frame = 8 @ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0 @ frame_needed = 1, uses_anonymous_args = 0
@@ -310,24 +303,24 @@ usart2_write:
add r7, sp, #0 add r7, sp, #0
.cfi_def_cfa_register 7 .cfi_def_cfa_register 7
str r0, [r7, #4] str r0, [r7, #4]
.loc 1 76 9 .loc 1 80 9
b .L12 b .L12
.L13: .L13:
.loc 1 76 38 discriminator 2 .loc 1 80 38 discriminator 2
ldr r3, [r7, #4] ldr r3, [r7, #4]
adds r2, r3, #1 adds r2, r3, #1
str r2, [r7, #4] str r2, [r7, #4]
.loc 1 76 16 discriminator 2 .loc 1 80 16 discriminator 2
ldrb r3, [r3] @ zero_extendqisi2 ldrb r3, [r3] @ zero_extendqisi2
mov r0, r3 mov r0, r3
bl usart2_write_byte bl usart2_write_byte
.L12: .L12:
.loc 1 76 10 discriminator 1 .loc 1 80 10 discriminator 1
ldr r3, [r7, #4] ldr r3, [r7, #4]
ldrb r3, [r3] @ zero_extendqisi2 ldrb r3, [r3] @ zero_extendqisi2
cmp r3, #0 cmp r3, #0
bne .L13 bne .L13
.loc 1 77 1 .loc 1 81 1
nop nop
nop nop
adds r7, r7, #8 adds r7, r7, #8
@@ -732,7 +725,7 @@ usart2_write:
.uleb128 0xe .uleb128 0xe
.4byte .LASF1000 .4byte .LASF1000
.byte 0x1 .byte 0x1
.byte 0x4b .byte 0x4f
.byte 0x6 .byte 0x6
.4byte .LFB3 .4byte .LFB3
.4byte .LFE3-.LFB3 .4byte .LFE3-.LFB3
@@ -741,7 +734,7 @@ usart2_write:
.4byte 0x320 .4byte 0x320
.uleb128 0x7 .uleb128 0x7
.ascii "buf\000" .ascii "buf\000"
.byte 0x4b .byte 0x4f
.byte 0x19 .byte 0x19
.4byte 0x320 .4byte 0x320
.uleb128 0x2 .uleb128 0x2
@@ -758,7 +751,7 @@ usart2_write:
.uleb128 0x10 .uleb128 0x10
.4byte .LASF1001 .4byte .LASF1001
.byte 0x1 .byte 0x1
.byte 0x42 .byte 0x46
.byte 0x6 .byte 0x6
.4byte .LFB2 .4byte .LFB2
.4byte .LFE2-.LFB2 .4byte .LFE2-.LFB2
@@ -767,7 +760,7 @@ usart2_write:
.4byte 0x350 .4byte 0x350
.uleb128 0x7 .uleb128 0x7
.ascii "c\000" .ascii "c\000"
.byte 0x42 .byte 0x46
.byte 0x20 .byte 0x20
.4byte 0x88 .4byte 0x88
.uleb128 0x2 .uleb128 0x2
@@ -776,7 +769,7 @@ usart2_write:
.byte 0 .byte 0
.uleb128 0x8 .uleb128 0x8
.4byte .LASF1002 .4byte .LASF1002
.byte 0x3e .byte 0x42
.4byte .LFB1 .4byte .LFB1
.4byte .LFE1-.LFB1 .4byte .LFE1-.LFB1
.uleb128 0x1 .uleb128 0x1

6
build/usart.i
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@@ -2266,11 +2266,11 @@ void usart2_init(void) {
((struct usart *) (0x40004400U))->CR1 = 0; ((struct usart *) (0x40004400U))->CR1 = 0;
((struct usart *) (0x40004400U))->CR2 = 0; ((struct usart *) (0x40004400U))->CR2 = 0;
((struct usart *) (0x40004400U))->CR3 = 0; ((struct usart *) (0x40004400U))->CR3 = 0;
# 50 "src/usart.c" # 54 "src/usart.c"
((struct usart *) (0x40004400U))->CR1 |= (1 << 15);
((struct usart *) (0x40004400U))->BRR &= ~((0b111111111111) << 4); ((struct usart *) (0x40004400U))->BRR &= ~((0b111111111111) << 4);
((struct usart *) (0x40004400U))->BRR |= (0x34 << 4); ((struct usart *) (0x40004400U))->BRR |= (0x34 << 4);
((struct usart *) (0x40004400U))->BRR &= ~((0b111) << 0); ((struct usart *) (0x40004400U))->BRR &= ~((0b111) << 0);
((struct usart *) (0x40004400U))->BRR |= (0x0 << 0); ((struct usart *) (0x40004400U))->BRR |= (0x0 << 0);

BIN
build/usart.o
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58
flake.nix
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@@ -5,36 +5,38 @@
nixpkgs.url = "github:nixos/nixpkgs/nixos-unstable"; nixpkgs.url = "github:nixos/nixpkgs/nixos-unstable";
}; };
outputs = { nixpkgs, ... }: outputs =
{ nixpkgs, ... }:
let let
systems = [ "x86_64-linux" ]; systems = [ "x86_64-linux" ];
in in
{ {
config = { config = {
nixpkgs.config.allowUnfree = true; nixpkgs.config.allowUnfree = true;
};
devShells = nixpkgs.lib.genAttrs systems (system:
let
# pkgs = nixpkgs.legacyPackages.${system};
pkgs = import nixpkgs {
inherit system;
config.allowUnfree = true;
};
in
{
default = pkgs.mkShell {
packages = [
pkgs.gnumake
pkgs.gcc-arm-embedded
pkgs.stlink
pkgs.gdb
pkgs.openocd
pkgs.stm32cubemx
pkgs.gdbgui
];
};
}
);
}; };
devShells = nixpkgs.lib.genAttrs systems (
system:
let
# pkgs = nixpkgs.legacyPackages.${system};
pkgs = import nixpkgs {
inherit system;
config.allowUnfree = true;
};
in
{
default = pkgs.mkShell {
packages = [
pkgs.gnumake
pkgs.gcc-arm-embedded
pkgs.stlink
pkgs.gdb
pkgs.openocd
pkgs.stm32cubemx
pkgs.gdbgui
];
};
}
);
};
} }

30
src/usart.c
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@@ -28,29 +28,33 @@ void usart2_init(void) {
USART2->CR3 = 0; USART2->CR3 = 0;
// Calculate Baud rate: // Calculate Baud rate:
// baud = f_clock / (8 * (2 - OVER8) * USARTDIV); => // baud = f_clck / (8 * (2 - OVER8) * USARTDIV) =>
// (8 * (2 - OVER8) * USARTDIV) = f_clock / baud; => // (8 * (2 - OVER8) * USARTDIV) = f_clock / baud =>
// USARTDIV = (f_clock / (baud * (8 * (2 - OVER8))); => // USARTDIV = (f_clock / (baud * (8 * (2 - OVER8)))
// Target Baud rate = 115200, f_clock = 48MHz // Target Baud rate = 115200, f_clock = 48MHz
// With OVER8 = 1 (oversampling by 8) // With OVER8 = 1 (oversampling by 8)
// USARTDIV = (48E6 / (115200 * (8 * (2 - 1))) = 52.083 // USARTDIV = (48E6 / (115200 * (8 * (2 - 0)))) = 26.0416666
// mantissa = 52 // mantissa = 26
// fraction = 0.083 * 8 = 0.664 ~= 1 // fraction = 0.041666 * 8 = 0.33328 ~= 0
// rounding fraction up: USARTDIV = 53 // rounding fraction up: USARTDIV = 26
// baud = 48E6 / (8 * (52 + 1)) = 113207.54716981133 // baud = 48E6 / (8 * 2 * 26) = 115384.61538461539
// error of 0.1% (115200 / 113207.54716981133) // error of 0.001% (115384.61538461539 / 115200 ) = 1.001602564102564
// rounding fraction down: USARTDIV = 52
// baud = 48E6 / (8 * 52) = 115384.61538461539
// error of 0.001% (115384.61538461539 / 115200)
USART2->CR1 |= USART_CR1_OVER8_8; // baud = f_clck / (8 * (2 - OVER8) * USARTDIV) */
// baud * ((8 * (2 - OVER8) * USARTDIV)) = f_clck */
// 393400 * (8 * 2 * 26) = 163654400
/* USART2->CR1 |= USART_CR1_OVER8_8; */
USART2->BRR &= ~(USART_BRR_MANTISSA_MASK << USART_BRR_MANTISSA_BIT); USART2->BRR &= ~(USART_BRR_MANTISSA_MASK << USART_BRR_MANTISSA_BIT);
USART2->BRR |= (0x34 << USART_BRR_MANTISSA_BIT); USART2->BRR |= (0x34 << USART_BRR_MANTISSA_BIT);
/* USART2->BRR |= (0x69 << USART_BRR_MANTISSA_BIT); */
/* USART2->BRR |= (0x1A << USART_BRR_MANTISSA_BIT); */
USART2->BRR &= ~(USART_BRR_FRACTION_MASK << USART_BRR_FRACTION_BIT); USART2->BRR &= ~(USART_BRR_FRACTION_MASK << USART_BRR_FRACTION_BIT);
USART2->BRR |= (0x0 << USART_BRR_FRACTION_BIT); USART2->BRR |= (0x0 << USART_BRR_FRACTION_BIT);