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wip why does HSE run at 16MHz?

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This commit is contained in:
Alexander Heldt
2024-12-28 15:03:49 +01:00
parent 4adddddd83
commit 2f4d38a0d8
20 changed files with 1921 additions and 1504 deletions
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README.md
+18 -2
View File
@@ -9,11 +9,27 @@ make build
## Probe for the board
Run
```sh
st-info --probe
st-info --probe
```
## Flashing
Run
```sh
make flash
make flash
```
## Debugging
### `st-info --probe` shows 0KB flash
```
> sudo st-info --probe
Found 1 stlink programmers
version: V2J43S28
serial: 0671FF343056363043090732
flash: 0 (pagesize: 16384) <--- 0KB flash
sram: 131072
chipid: 0x431
dev-type: STM32F411xC_xE
```
This can happen when the flash is locked. One way to unlock it is to erase the entire chip via the
Windows application `ST-Link Util`.
build/final.elf
BIN
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Binary file not shown.
build/final.elf.map
+141 -141
View File
@@ -53,7 +53,7 @@ Discarded input sections
.debug_macro 0x00000000 0x89 build/main.o
.debug_macro 0x00000000 0x4cc build/main.o
.debug_macro 0x00000000 0x22 build/main.o
.debug_macro 0x00000000 0x88 build/main.o
.debug_macro 0x00000000 0xa0 build/main.o
.group 0x00000000 0xc build/startup.o
.group 0x00000000 0xc build/startup.o
.group 0x00000000 0xc build/startup.o
@@ -128,7 +128,7 @@ Discarded input sections
.debug_macro 0x00000000 0x1df build/usart.o
.debug_macro 0x00000000 0x89 build/usart.o
.debug_macro 0x00000000 0x4cc build/usart.o
.debug_macro 0x00000000 0x13e build/usart.o
.debug_macro 0x00000000 0x191 build/usart.o
.debug_macro 0x00000000 0x22 build/usart.o
.debug_macro 0x00000000 0x82 build/usart.o
@@ -157,7 +157,7 @@ LOAD build/usart.o
0x08000000 interrupt_vector_table
0x08000198 . = ALIGN (0x4)
.text 0x08000198 0x4e4
.text 0x08000198 0x4f8
0x08000198 . = ALIGN (0x4)
*(.text)
*(.text.*)
@@ -169,129 +169,129 @@ LOAD build/usart.o
0x080001fa gpio_write
*fill* 0x08000246 0x2
.text.system_clock_init
0x08000248 0x144 build/main.o
.text.main 0x0800038c 0x9c build/main.o
0x0800038c main
0x08000248 0x13c build/main.o
.text.main 0x08000384 0x9c build/main.o
0x08000384 main
.text.init_memory
0x08000428 0x64 build/startup.o
0x08000428 init_memory
.text.reset 0x0800048c 0x10 build/startup.o
0x0800048c reset
0x08000420 0x64 build/startup.o
0x08000420 init_memory
.text.reset 0x08000484 0x10 build/startup.o
0x08000484 reset
.text.default_handler
0x0800049c 0x8 build/startup.o
0x0800049c exti0
0x0800049c debug_monitor
0x0800049c rcc
0x0800049c x
0x0800049c sdio
0x0800049c usage_fault
0x0800049c tim1_up_tim10
0x0800049c usart1
0x0800049c i2c3_er
0x0800049c spi2
0x0800049c dma1_stream1
0x0800049c bus_fault
0x0800049c spi5
0x0800049c exti3
0x0800049c dma2_stream5
0x0800049c tim2
0x0800049c dma1_stream6
0x0800049c default_handler
0x0800049c i2c1_er
0x0800049c hard_fault
0x0800049c usart6
0x0800049c exti15_10
0x0800049c usart2
0x0800049c pend_sv
0x0800049c i2c1_ev
0x0800049c wwdg
0x0800049c adc
0x0800049c rtc_alarm
0x0800049c spi3
0x0800049c exti1
0x0800049c mem_manage
0x0800049c dma2_stream1
0x0800049c dma1_stream2
0x0800049c dma2_stream3
0x0800049c sv_call
0x0800049c tim3
0x0800049c otg_fs
0x0800049c dma1_stream5
0x0800049c dma2_stream6
0x0800049c flash
0x0800049c tamp_stamp
0x0800049c i2c3_ev
0x0800049c rtc_wkup
0x0800049c dma2_stream0
0x0800049c pvd
0x0800049c fpu
0x0800049c exti4
0x0800049c exti2
0x0800049c spi1
0x0800049c dma1_stream0
0x0800049c tim1_brk_tim9
0x0800049c i2c2_ev
0x0800049c otg_fs_wkup
0x0800049c spi4
0x0800049c dma2_stream2
0x0800049c tim1_cc
0x0800049c tim1_trg_com_tim11
0x0800049c exti9_5
0x0800049c dma1_stream3
0x0800049c dma2_stream4
0x0800049c i2c2_er
0x0800049c dma2_stream7
0x0800049c dma1_stream7
0x0800049c nmi
0x0800049c systick
0x0800049c tim4
0x0800049c tim5
0x0800049c dma1_stream4
0x08000494 0x8 build/startup.o
0x08000494 exti0
0x08000494 debug_monitor
0x08000494 rcc
0x08000494 x
0x08000494 sdio
0x08000494 usage_fault
0x08000494 tim1_up_tim10
0x08000494 usart1
0x08000494 i2c3_er
0x08000494 spi2
0x08000494 dma1_stream1
0x08000494 bus_fault
0x08000494 spi5
0x08000494 exti3
0x08000494 dma2_stream5
0x08000494 tim2
0x08000494 dma1_stream6
0x08000494 default_handler
0x08000494 i2c1_er
0x08000494 hard_fault
0x08000494 usart6
0x08000494 exti15_10
0x08000494 usart2
0x08000494 pend_sv
0x08000494 i2c1_ev
0x08000494 wwdg
0x08000494 adc
0x08000494 rtc_alarm
0x08000494 spi3
0x08000494 exti1
0x08000494 mem_manage
0x08000494 dma2_stream1
0x08000494 dma1_stream2
0x08000494 dma2_stream3
0x08000494 sv_call
0x08000494 tim3
0x08000494 otg_fs
0x08000494 dma1_stream5
0x08000494 dma2_stream6
0x08000494 flash
0x08000494 tamp_stamp
0x08000494 i2c3_ev
0x08000494 rtc_wkup
0x08000494 dma2_stream0
0x08000494 pvd
0x08000494 fpu
0x08000494 exti4
0x08000494 exti2
0x08000494 spi1
0x08000494 dma1_stream0
0x08000494 tim1_brk_tim9
0x08000494 i2c2_ev
0x08000494 otg_fs_wkup
0x08000494 spi4
0x08000494 dma2_stream2
0x08000494 tim1_cc
0x08000494 tim1_trg_com_tim11
0x08000494 exti9_5
0x08000494 dma1_stream3
0x08000494 dma2_stream4
0x08000494 i2c2_er
0x08000494 dma2_stream7
0x08000494 dma1_stream7
0x08000494 nmi
0x08000494 systick
0x08000494 tim4
0x08000494 tim5
0x08000494 dma1_stream4
.text.tim4_init
0x080004a4 0x40 build/timer.o
0x080004a4 tim4_init
0x0800049c 0x40 build/timer.o
0x0800049c tim4_init
.text.tim4_start
0x080004e4 0x20 build/timer.o
0x080004e4 tim4_start
0x080004dc 0x20 build/timer.o
0x080004dc tim4_start
.text.usart2_init
0x08000504 0xec build/usart.o
0x08000504 usart2_init
0x080004fc 0x114 build/usart.o
0x080004fc usart2_init
.text.usart2_start
0x080005f0 0x20 build/usart.o
0x080005f0 usart2_start
0x08000610 0x20 build/usart.o
0x08000610 usart2_start
.text.usart2_write_byte
0x08000610 0x30 build/usart.o
0x08000610 usart2_write_byte
0x08000630 0x30 build/usart.o
0x08000630 usart2_write_byte
.text.usart2_write
0x08000640 0x2a build/usart.o
0x08000640 usart2_write
0x08000660 0x2a build/usart.o
0x08000660 usart2_write
*(.rodata)
*fill* 0x0800066a 0x2
.rodata 0x0800066c 0xe build/main.o
*fill* 0x0800068a 0x2
.rodata 0x0800068c 0x3 build/main.o
*(.rodata.*)
0x0800067c . = ALIGN (0x4)
*fill* 0x0800067a 0x2
0x0800067c _data_addr = LOADADDR (.data)
0x08000690 . = ALIGN (0x4)
*fill* 0x0800068f 0x1
0x08000690 _data_addr = LOADADDR (.data)
.glue_7 0x0800067c 0x0
.glue_7 0x0800067c 0x0 linker stubs
.glue_7 0x08000690 0x0
.glue_7 0x08000690 0x0 linker stubs
.glue_7t 0x0800067c 0x0
.glue_7t 0x0800067c 0x0 linker stubs
.glue_7t 0x08000690 0x0
.glue_7t 0x08000690 0x0 linker stubs
.vfp11_veneer 0x0800067c 0x0
.vfp11_veneer 0x0800067c 0x0 linker stubs
.vfp11_veneer 0x08000690 0x0
.vfp11_veneer 0x08000690 0x0 linker stubs
.v4_bx 0x0800067c 0x0
.v4_bx 0x0800067c 0x0 linker stubs
.v4_bx 0x08000690 0x0
.v4_bx 0x08000690 0x0 linker stubs
.iplt 0x0800067c 0x0
.iplt 0x0800067c 0x0 build/main.o
.iplt 0x08000690 0x0
.iplt 0x08000690 0x0 build/main.o
.rel.dyn 0x0800067c 0x0
.rel.iplt 0x0800067c 0x0 build/main.o
.rel.dyn 0x08000690 0x0
.rel.iplt 0x08000690 0x0 build/main.o
.data 0x20000000 0x0 load address 0x0800067c
.data 0x20000000 0x0 load address 0x08000690
0x20000000 . = ALIGN (0x4)
0x20000000 _data_start = .
*(.data)
@@ -299,10 +299,10 @@ LOAD build/usart.o
0x20000000 . = ALIGN (0x4)
0x20000000 _data_end = .
.igot.plt 0x20000000 0x0 load address 0x0800067c
.igot.plt 0x20000000 0x0 load address 0x08000690
.igot.plt 0x20000000 0x0 build/main.o
.bss 0x20000000 0x0 load address 0x0800067c
.bss 0x20000000 0x0 load address 0x08000690
0x20000000 . = ALIGN (0x4)
0x20000000 _bss_start = .
*(.bss)
@@ -351,7 +351,7 @@ LOAD linker stubs
.debug_rnglists
0x0000006c 0x26 build/usart.o
.debug_macro 0x00000000 0x48a9
.debug_macro 0x00000000 0x497f
.debug_macro 0x00000000 0xb56 build/gpio.o
.debug_macro 0x00000b56 0x22 build/gpio.o
.debug_macro 0x00000b78 0x75 build/gpio.o
@@ -366,39 +366,39 @@ LOAD linker stubs
.debug_macro 0x0000108c 0x89 build/gpio.o
.debug_macro 0x00001115 0x4cc build/gpio.o
.debug_macro 0x000015e1 0x22 build/gpio.o
.debug_macro 0x00001603 0x88 build/gpio.o
.debug_macro 0x0000168b 0xb89 build/main.o
.debug_macro 0x00002214 0x144 build/main.o
.debug_macro 0x00002358 0x46 build/main.o
.debug_macro 0x0000239e 0x2e build/main.o
.debug_macro 0x000023cc 0x22 build/main.o
.debug_macro 0x000023ee 0x82 build/main.o
.debug_macro 0x00002470 0xb02 build/startup.o
.debug_macro 0x00002f72 0x56 build/startup.o
.debug_macro 0x00002fc8 0x51 build/startup.o
.debug_macro 0x00003019 0xb5c build/timer.o
.debug_macro 0x00003b75 0x13e build/timer.o
.debug_macro 0x00003cb3 0xb74 build/usart.o
.debug_macro 0x00004827 0x82 build/usart.o
.debug_macro 0x00001603 0xa0 build/gpio.o
.debug_macro 0x000016a3 0xb89 build/main.o
.debug_macro 0x0000222c 0x197 build/main.o
.debug_macro 0x000023c3 0x46 build/main.o
.debug_macro 0x00002409 0x2e build/main.o
.debug_macro 0x00002437 0x22 build/main.o
.debug_macro 0x00002459 0x82 build/main.o
.debug_macro 0x000024db 0xb02 build/startup.o
.debug_macro 0x00002fdd 0x56 build/startup.o
.debug_macro 0x00003033 0x51 build/startup.o
.debug_macro 0x00003084 0xb5c build/timer.o
.debug_macro 0x00003be0 0x191 build/timer.o
.debug_macro 0x00003d71 0xb74 build/usart.o
.debug_macro 0x000048e5 0x9a build/usart.o
.debug_line 0x00000000 0x661
.debug_line 0x00000000 0x677
.debug_line 0x00000000 0x116 build/gpio.o
.debug_line 0x00000116 0x1e4 build/main.o
.debug_line 0x000002fa 0xea build/startup.o
.debug_line 0x000003e4 0xdf build/timer.o
.debug_line 0x000004c3 0x19e build/usart.o
.debug_line 0x00000116 0x1e8 build/main.o
.debug_line 0x000002fe 0xea build/startup.o
.debug_line 0x000003e8 0xdf build/timer.o
.debug_line 0x000004c7 0x1b0 build/usart.o
.debug_str 0x00000000 0x63e6
.debug_str 0x00000000 0x5508 build/gpio.o
0x56b0 (size before relaxing)
.debug_str 0x00005508 0xe17 build/main.o
0x6477 (size before relaxing)
.debug_str 0x0000631f 0x88 build/startup.o
.debug_str 0x00000000 0x658b
.debug_str 0x00000000 0x5574 build/gpio.o
0x571c (size before relaxing)
.debug_str 0x00005574 0xf50 build/main.o
0x661c (size before relaxing)
.debug_str 0x000064c4 0x88 build/startup.o
0x3cdc (size before relaxing)
.debug_str 0x000063a7 0xc build/timer.o
0x5bc2 (size before relaxing)
.debug_str 0x000063b3 0x33 build/usart.o
0x60ec (size before relaxing)
.debug_str 0x0000654c 0xc build/timer.o
0x5cfb (size before relaxing)
.debug_str 0x00006558 0x33 build/usart.o
0x6291 (size before relaxing)
.comment 0x00000000 0x45
.comment 0x00000000 0x45 build/gpio.o
build/gpio.S
+133 -113
View File
@@ -188,10 +188,10 @@ gpio_write:
.byte 0x4
.4byte .Ldebug_abbrev0
.uleb128 0x8
.4byte .LASF908
.4byte .LASF912
.byte 0x1d
.4byte .LASF909
.4byte .LASF910
.4byte .LASF913
.4byte .LASF914
.4byte .LLRL0
.4byte 0
.4byte .Ldebug_line0
@@ -199,17 +199,17 @@ gpio_write:
.uleb128 0x1
.byte 0x1
.byte 0x6
.4byte .LASF877
.4byte .LASF881
.uleb128 0x1
.byte 0x1
.byte 0x8
.4byte .LASF878
.4byte .LASF882
.uleb128 0x1
.byte 0x2
.byte 0x5
.4byte .LASF879
.4byte .LASF883
.uleb128 0x3
.4byte .LASF882
.4byte .LASF886
.byte 0x2
.byte 0x39
.byte 0x1c
@@ -217,13 +217,13 @@ gpio_write:
.uleb128 0x1
.byte 0x2
.byte 0x7
.4byte .LASF880
.4byte .LASF884
.uleb128 0x1
.byte 0x4
.byte 0x5
.4byte .LASF881
.4byte .LASF885
.uleb128 0x3
.4byte .LASF883
.4byte .LASF887
.byte 0x2
.byte 0x4f
.byte 0x1b
@@ -231,21 +231,21 @@ gpio_write:
.uleb128 0x1
.byte 0x4
.byte 0x7
.4byte .LASF884
.4byte .LASF888
.uleb128 0x1
.byte 0x8
.byte 0x5
.4byte .LASF885
.4byte .LASF889
.uleb128 0x1
.byte 0x8
.byte 0x7
.4byte .LASF886
.4byte .LASF890
.uleb128 0x9
.byte 0x4
.byte 0x5
.ascii "int\000"
.uleb128 0x3
.4byte .LASF887
.4byte .LASF891
.byte 0x2
.byte 0xe8
.byte 0x16
@@ -253,15 +253,15 @@ gpio_write:
.uleb128 0x1
.byte 0x4
.byte 0x7
.4byte .LASF888
.4byte .LASF892
.uleb128 0x3
.4byte .LASF889
.4byte .LASF893
.byte 0x3
.byte 0x24
.byte 0x14
.4byte 0x3f
.uleb128 0x3
.4byte .LASF890
.4byte .LASF894
.byte 0x3
.byte 0x30
.byte 0x14
@@ -269,35 +269,35 @@ gpio_write:
.uleb128 0xa
.4byte 0xa0
.uleb128 0x3
.4byte .LASF891
.4byte .LASF895
.byte 0x3
.byte 0x52
.byte 0x15
.4byte 0x81
.uleb128 0xb
.4byte .LASF907
.4byte .LASF911
.byte 0x28
.byte 0x4
.byte 0x7
.byte 0x8
.4byte 0x139
.uleb128 0x2
.4byte .LASF892
.4byte .LASF896
.byte 0x8
.4byte 0xac
.byte 0
.uleb128 0x2
.4byte .LASF893
.4byte .LASF897
.byte 0x9
.4byte 0xac
.byte 0x4
.uleb128 0x2
.4byte .LASF894
.4byte .LASF898
.byte 0xa
.4byte 0xac
.byte 0x8
.uleb128 0x2
.4byte .LASF895
.4byte .LASF899
.byte 0xb
.4byte 0xac
.byte 0xc
@@ -312,22 +312,22 @@ gpio_write:
.4byte 0xac
.byte 0x14
.uleb128 0x2
.4byte .LASF896
.4byte .LASF900
.byte 0xe
.4byte 0xac
.byte 0x18
.uleb128 0x2
.4byte .LASF897
.4byte .LASF901
.byte 0xf
.4byte 0xac
.byte 0x1c
.uleb128 0x2
.4byte .LASF898
.4byte .LASF902
.byte 0x10
.4byte 0xac
.byte 0x20
.uleb128 0x2
.4byte .LASF899
.4byte .LASF903
.byte 0x11
.4byte 0xac
.byte 0x24
@@ -337,30 +337,30 @@ gpio_write:
.byte 0x1
.4byte 0x31
.byte 0x4
.byte 0x38
.byte 0x40
.byte 0xe
.4byte 0x160
.uleb128 0x4
.4byte .LASF900
.4byte .LASF904
.byte 0
.uleb128 0x4
.4byte .LASF901
.4byte .LASF905
.byte 0x1
.uleb128 0x4
.4byte .LASF902
.4byte .LASF906
.byte 0x2
.uleb128 0x4
.4byte .LASF903
.4byte .LASF907
.byte 0x3
.byte 0
.uleb128 0x3
.4byte .LASF904
.4byte .LASF908
.byte 0x4
.byte 0x3d
.byte 0x45
.byte 0x3
.4byte 0x139
.uleb128 0xd
.4byte .LASF911
.4byte .LASF915
.byte 0x1
.byte 0xd
.byte 0x6
@@ -386,7 +386,7 @@ gpio_write:
.byte 0x91
.sleb128 -19
.uleb128 0x7
.4byte .LASF907
.4byte .LASF911
.byte 0xe
.4byte 0x1b3
.uleb128 0x2
@@ -396,12 +396,12 @@ gpio_write:
.uleb128 0x1
.byte 0x1
.byte 0x2
.4byte .LASF905
.4byte .LASF909
.uleb128 0xe
.byte 0x4
.4byte 0xbd
.uleb128 0xf
.4byte .LASF912
.4byte .LASF916
.byte 0x1
.byte 0x6
.byte 0x6
@@ -418,7 +418,7 @@ gpio_write:
.byte 0x91
.sleb128 -18
.uleb128 0x10
.4byte .LASF906
.4byte .LASF910
.byte 0x1
.byte 0x6
.byte 0x2c
@@ -427,7 +427,7 @@ gpio_write:
.byte 0x91
.sleb128 -19
.uleb128 0x7
.4byte .LASF907
.4byte .LASF911
.byte 0x7
.4byte 0x1b3
.uleb128 0x2
@@ -3525,7 +3525,7 @@ gpio_write:
.uleb128 0x32
.4byte .LASF854
.byte 0
.section .debug_macro,"G",%progbits,wm4.gpio.h.2.482807a1c0512cd436d5862f3edb1adc,comdat
.section .debug_macro,"G",%progbits,wm4.gpio.h.2.bc74b8bd59193b3190f972f5d232b4bf,comdat
.Ldebug_macro15:
.2byte 0x5
.byte 0
@@ -3542,40 +3542,40 @@ gpio_write:
.uleb128 0x18
.4byte .LASF858
.byte 0x5
.uleb128 0x19
.uleb128 0x1a
.4byte .LASF859
.byte 0x5
.uleb128 0x1a
.uleb128 0x1b
.4byte .LASF860
.byte 0x5
.uleb128 0x1c
.uleb128 0x1d
.4byte .LASF861
.byte 0x5
.uleb128 0x1d
.uleb128 0x1e
.4byte .LASF862
.byte 0x5
.uleb128 0x1e
.uleb128 0x20
.4byte .LASF863
.byte 0x5
.uleb128 0x21
.4byte .LASF864
.byte 0x5
.uleb128 0x22
.uleb128 0x24
.4byte .LASF865
.byte 0x5
.uleb128 0x23
.uleb128 0x25
.4byte .LASF866
.byte 0x5
.uleb128 0x25
.uleb128 0x26
.4byte .LASF867
.byte 0x5
.uleb128 0x26
.uleb128 0x29
.4byte .LASF868
.byte 0x5
.uleb128 0x27
.uleb128 0x2a
.4byte .LASF869
.byte 0x5
.uleb128 0x2c
.uleb128 0x2b
.4byte .LASF870
.byte 0x5
.uleb128 0x2d
@@ -3584,17 +3584,29 @@ gpio_write:
.uleb128 0x2e
.4byte .LASF872
.byte 0x5
.uleb128 0x30
.uleb128 0x2f
.4byte .LASF873
.byte 0x5
.uleb128 0x32
.uleb128 0x34
.4byte .LASF874
.byte 0x5
.uleb128 0x34
.uleb128 0x35
.4byte .LASF875
.byte 0x5
.uleb128 0x36
.4byte .LASF876
.byte 0x5
.uleb128 0x38
.4byte .LASF877
.byte 0x5
.uleb128 0x3a
.4byte .LASF878
.byte 0x5
.uleb128 0x3c
.4byte .LASF879
.byte 0x5
.uleb128 0x3e
.4byte .LASF880
.byte 0
.section .debug_line,"",%progbits
.Ldebug_line0:
@@ -3639,7 +3651,7 @@ gpio_write:
.ascii "__PTRDIFF_MAX__ 0x7fffffff\000"
.LASF541:
.ascii "_LONG_DOUBLE long double\000"
.LASF907:
.LASF911:
.ascii "gpio\000"
.LASF591:
.ascii "INT_LEAST8_MIN (-__INT_LEAST8_MAX__ - 1)\000"
@@ -3647,7 +3659,7 @@ gpio_write:
.ascii "_UINT32_T_DECLARED \000"
.LASF90:
.ascii "__INTMAX_MAX__ 0x7fffffffffffffffLL\000"
.LASF902:
.LASF906:
.ascii "GPIO_MODE_AF\000"
.LASF335:
.ascii "__TQ_IBIT__ 0\000"
@@ -3711,8 +3723,6 @@ gpio_write:
.ascii "PRIXFAST32 __PRI32FAST(X)\000"
.LASF525:
.ascii "__INT8 \"hh\"\000"
.LASF860:
.ascii "GPIO_MODER_MODER3_AF (0b10)\000"
.LASF47:
.ascii "__UINT8_TYPE__ unsigned char\000"
.LASF368:
@@ -3765,12 +3775,14 @@ gpio_write:
.ascii "__need_wchar_t\000"
.LASF199:
.ascii "__FLT32_MIN_EXP__ (-125)\000"
.LASF908:
.LASF912:
.ascii "GNU C2X 12.3.1 20230626 -mcpu=cortex-m4 -mthumb -mf"
.ascii "loat-abi=hard -mfpu=fpv4-sp-d16 -march=armv7e-m+fp "
.ascii "-g3 -ggdb -O0 -std=c2x -ffunction-sections -fdata-s"
.ascii "ections -fno-builtin -fno-common\000"
.LASF864:
.LASF865:
.ascii "GPIO_AFRH_AFRH8_BIT 0\000"
.LASF868:
.ascii "GPIO_AFRL_AFRL3_BIT 12\000"
.LASF595:
.ascii "INT16_MAX (__INT16_MAX__)\000"
@@ -3852,7 +3864,7 @@ gpio_write:
.ascii "__INT64 \"ll\"\000"
.LASF138:
.ascii "__INTPTR_MAX__ 0x7fffffff\000"
.LASF872:
.LASF876:
.ascii "GPIO(port) ((struct gpio*)(uintptr_t)(GPIO_BASE_ADD"
.ascii "R + (GPIO_PORT_OFFSET * port)))\000"
.LASF499:
@@ -3888,7 +3900,7 @@ gpio_write:
.ascii "PRId64 __PRI64(d)\000"
.LASF302:
.ascii "__UACCUM_IBIT__ 16\000"
.LASF881:
.LASF885:
.ascii "long int\000"
.LASF818:
.ascii "PRIXFAST64 __PRI64FAST(X)\000"
@@ -3916,6 +3928,8 @@ gpio_write:
.ascii "PRIdFAST32 __PRI32FAST(d)\000"
.LASF93:
.ascii "__UINTMAX_C(c) c ## ULL\000"
.LASF866:
.ascii "GPIO_AFRH_AFRH8_MASK (0b1111)\000"
.LASF31:
.ascii "__SIZEOF_POINTER__ 4\000"
.LASF621:
@@ -3924,8 +3938,6 @@ gpio_write:
.ascii "__GCC_ATOMIC_BOOL_LOCK_FREE 2\000"
.LASF554:
.ascii "___int64_t_defined 1\000"
.LASF863:
.ascii "GPIO_MODER_MODER2_AF (0b10)\000"
.LASF432:
.ascii "__ARM_NEON__\000"
.LASF587:
@@ -3986,7 +3998,7 @@ gpio_write:
.ascii "PRIoLEAST16 __PRI16LEAST(o)\000"
.LASF458:
.ascii "__NEWLIB__ 4\000"
.LASF900:
.LASF904:
.ascii "GPIO_MODE_INPUT\000"
.LASF720:
.ascii "SCNi16 __SCN16(i)\000"
@@ -3996,7 +4008,7 @@ gpio_write:
.ascii "__FLT_DECIMAL_DIG__ 9\000"
.LASF562:
.ascii "_UINT8_T_DECLARED \000"
.LASF877:
.LASF881:
.ascii "signed char\000"
.LASF805:
.ascii "PRIuLEAST64 __PRI64LEAST(u)\000"
@@ -4008,7 +4020,7 @@ gpio_write:
.ascii "__ARM_FEATURE_FMA 1\000"
.LASF364:
.ascii "__GNUC_STDC_INLINE__ 1\000"
.LASF904:
.LASF908:
.ascii "GPIO_MODE\000"
.LASF256:
.ascii "__FRACT_FBIT__ 15\000"
@@ -4030,11 +4042,11 @@ gpio_write:
.ascii "__SACCUM_MAX__ 0X7FFFP-7HK\000"
.LASF219:
.ascii "__FLT64_MAX_10_EXP__ 308\000"
.LASF868:
.LASF872:
.ascii "GPIO_AFRL_AFRL2_MASK (0b1111)\000"
.LASF65:
.ascii "__UINT_FAST32_TYPE__ unsigned int\000"
.LASF878:
.LASF882:
.ascii "unsigned char\000"
.LASF3:
.ascii "__STDC_UTF_32__ 1\000"
@@ -4082,13 +4094,13 @@ gpio_write:
.ascii "__int_fast64_t_defined 1\000"
.LASF837:
.ascii "__PRIPTR(x) __STRINGIFY(x)\000"
.LASF889:
.LASF893:
.ascii "uint16_t\000"
.LASF417:
.ascii "__thumb2__ 1\000"
.LASF321:
.ascii "__ULLACCUM_FBIT__ 32\000"
.LASF905:
.LASF909:
.ascii "_Bool\000"
.LASF366:
.ascii "__STRICT_ANSI__ 1\000"
@@ -4106,7 +4118,7 @@ gpio_write:
.ascii "__PRAGMA_REDEFINE_EXTNAME 1\000"
.LASF36:
.ascii "__WCHAR_TYPE__ unsigned int\000"
.LASF901:
.LASF905:
.ascii "GPIO_MODE_OUTPUT\000"
.LASF357:
.ascii "__USA_IBIT__ 16\000"
@@ -4144,7 +4156,7 @@ gpio_write:
.ascii "__SCN64(x) __INT64 __STRINGIFY(x)\000"
.LASF646:
.ascii "_GCC_WRAP_STDINT_H \000"
.LASF882:
.LASF886:
.ascii "__uint16_t\000"
.LASF224:
.ascii "__FLT64_EPSILON__ 2.2204460492503131e-16F64\000"
@@ -4172,7 +4184,7 @@ gpio_write:
.ascii "INTMAX_MAX (__INTMAX_MAX__)\000"
.LASF601:
.ascii "INT32_MAX (__INT32_MAX__)\000"
.LASF873:
.LASF877:
.ascii "BIT(x) (1 << x)\000"
.LASF469:
.ascii "_MB_LEN_MAX 8\000"
@@ -4190,7 +4202,7 @@ gpio_write:
.ascii "_END_STD_C \000"
.LASF852:
.ascii "true ((_Bool)+1u)\000"
.LASF865:
.LASF869:
.ascii "GPIO_AFRL_AFRL3_MASK (0b1111)\000"
.LASF599:
.ascii "UINT_LEAST16_MAX (__UINT_LEAST16_MAX__)\000"
@@ -4204,7 +4216,7 @@ gpio_write:
.ascii "__FLT_EPSILON__ 1.1920928955078125e-7F\000"
.LASF376:
.ascii "__GCC_ATOMIC_SHORT_LOCK_FREE 2\000"
.LASF874:
.LASF878:
.ascii "PIN(port,num) ((((port) - 'A') << 8) | num)\000"
.LASF806:
.ascii "PRIxLEAST64 __PRI64LEAST(x)\000"
@@ -4270,7 +4282,7 @@ gpio_write:
.ascii "__FP_FAST_FMAF 1\000"
.LASF628:
.ascii "SIG_ATOMIC_MIN (-__STDINT_EXP(INT_MAX) - 1)\000"
.LASF869:
.LASF873:
.ascii "GPIO_AFRL_AFRL2_USART2_TX (0b0111)\000"
.LASF564:
.ascii "_INT16_T_DECLARED \000"
@@ -4294,6 +4306,8 @@ gpio_write:
.ascii "__ARM_FEATURE_FP16_FML\000"
.LASF802:
.ascii "PRIdLEAST64 __PRI64LEAST(d)\000"
.LASF858:
.ascii "GPIO_MODER_AF_MODE (0b10)\000"
.LASF255:
.ascii "__USFRACT_EPSILON__ 0x1P-8UHR\000"
.LASF762:
@@ -4314,7 +4328,7 @@ gpio_write:
.ascii "INT64_C(x) __INT64_C(x)\000"
.LASF615:
.ascii "INT_FAST16_MIN (-__INT_FAST16_MAX__ - 1)\000"
.LASF862:
.LASF864:
.ascii "GPIO_MODER_MODER2_MASK (0b11)\000"
.LASF106:
.ascii "__INT_LEAST8_MAX__ 0x7f\000"
@@ -4342,6 +4356,8 @@ gpio_write:
.ascii "__PRI8LEAST(x) __LEAST8 __STRINGIFY(x)\000"
.LASF174:
.ascii "__DBL_EPSILON__ ((double)2.2204460492503131e-16L)\000"
.LASF860:
.ascii "GPIO_MODER_MODER8_MASK (0b11)\000"
.LASF268:
.ascii "__LFRACT_MIN__ (-0.5LR-0.5LR)\000"
.LASF117:
@@ -4364,7 +4380,7 @@ gpio_write:
.ascii "___int8_t_defined 1\000"
.LASF248:
.ascii "__SFRACT_MIN__ (-0.5HR-0.5HR)\000"
.LASF884:
.LASF888:
.ascii "long unsigned int\000"
.LASF349:
.ascii "__SA_IBIT__ 16\000"
@@ -4380,7 +4396,7 @@ gpio_write:
.ascii "__ARM_FP16_FORMAT_IEEE\000"
.LASF48:
.ascii "__UINT16_TYPE__ short unsigned int\000"
.LASF911:
.LASF915:
.ascii "gpio_write\000"
.LASF569:
.ascii "__int32_t_defined 1\000"
@@ -4424,7 +4440,7 @@ gpio_write:
.ascii "SCNx8 __SCN8(x)\000"
.LASF208:
.ascii "__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32\000"
.LASF912:
.LASF916:
.ascii "gpio_set_mode\000"
.LASF125:
.ascii "__UINT64_C(c) c ## ULL\000"
@@ -4446,7 +4462,7 @@ gpio_write:
.ascii "__GCC_ATOMIC_CHAR16_T_LOCK_FREE 2\000"
.LASF789:
.ascii "__PRI64FAST(x) __FAST64 __STRINGIFY(x)\000"
.LASF891:
.LASF895:
.ascii "uintptr_t\000"
.LASF168:
.ascii "__DBL_MAX_EXP__ 1024\000"
@@ -4494,7 +4510,7 @@ gpio_write:
.ascii "PRIX32 __PRI32(X)\000"
.LASF773:
.ascii "SCNxLEAST32 __SCN32LEAST(x)\000"
.LASF894:
.LASF898:
.ascii "OSPEEDR\000"
.LASF711:
.ascii "__SCN16LEAST(x) __LEAST16 __STRINGIFY(x)\000"
@@ -4524,7 +4540,7 @@ gpio_write:
.ascii "__ULACCUM_MIN__ 0.0ULK\000"
.LASF461:
.ascii "_ATEXIT_DYNAMIC_ALLOC 1\000"
.LASF883:
.LASF887:
.ascii "__uint32_t\000"
.LASF188:
.ascii "__LDBL_MAX__ 1.7976931348623157e+308L\000"
@@ -4534,7 +4550,7 @@ gpio_write:
.ascii "__FLT_RADIX__ 2\000"
.LASF454:
.ascii "_INTTYPES_H \000"
.LASF885:
.LASF889:
.ascii "long long int\000"
.LASF401:
.ascii "__ARM_FEATURE_CMSE\000"
@@ -4570,7 +4586,7 @@ gpio_write:
.ascii "__WCHAR_T \000"
.LASF223:
.ascii "__FLT64_MIN__ 2.2250738585072014e-308F64\000"
.LASF866:
.LASF870:
.ascii "GPIO_AFRL_AFRL3_USART2_RX (0b0111)\000"
.LASF553:
.ascii "___int32_t_defined 1\000"
@@ -4641,20 +4657,22 @@ gpio_write:
.ascii "\000"
.LASF582:
.ascii "__int_fast16_t_defined 1\000"
.LASF892:
.LASF896:
.ascii "MODER\000"
.LASF482:
.ascii "__FLOAT_TYPE float\000"
.LASF185:
.ascii "__LDBL_MAX_10_EXP__ 308\000"
.LASF867:
.ascii "GPIO_AFRH_AFRH8_MCO_1 (0b0000)\000"
.LASF175:
.ascii "__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324"
.ascii "L)\000"
.LASF607:
.ascii "INT64_MAX (__INT64_MAX__)\000"
.LASF888:
.LASF892:
.ascii "unsigned int\000"
.LASF887:
.LASF891:
.ascii "__uintptr_t\000"
.LASF459:
.ascii "__NEWLIB_MINOR__ 3\000"
@@ -4686,7 +4704,7 @@ gpio_write:
.ascii "__CHAR_BIT__ 8\000"
.LASF143:
.ascii "__FLT_EVAL_METHOD__ 0\000"
.LASF879:
.LASF883:
.ascii "short int\000"
.LASF685:
.ascii "PRIdLEAST8 __PRI8LEAST(d)\000"
@@ -4746,6 +4764,8 @@ gpio_write:
.ascii "__ATFILE_VISIBLE 0\000"
.LASF372:
.ascii "__GCC_ATOMIC_CHAR_LOCK_FREE 2\000"
.LASF859:
.ascii "GPIO_MODER_MODER8_BIT 16\000"
.LASF270:
.ascii "__LFRACT_EPSILON__ 0x1P-31LR\000"
.LASF808:
@@ -4812,7 +4832,7 @@ gpio_write:
.ascii "__UFRACT_IBIT__ 0\000"
.LASF399:
.ascii "__ARM_32BIT_STATE 1\000"
.LASF861:
.LASF863:
.ascii "GPIO_MODER_MODER2_BIT 4\000"
.LASF107:
.ascii "__INT8_C(c) c\000"
@@ -4826,13 +4846,13 @@ gpio_write:
.ascii "SCNuFAST16 __SCN16FAST(u)\000"
.LASF801:
.ascii "SCNx64 __SCN64(x)\000"
.LASF876:
.LASF880:
.ascii "PINPORT(pin) (pin >> 8)\000"
.LASF198:
.ascii "__FLT32_DIG__ 6\000"
.LASF645:
.ascii "UINTMAX_C(x) __UINTMAX_C(x)\000"
.LASF859:
.LASF862:
.ascii "GPIO_MODER_MODER3_MASK (0b11)\000"
.LASF623:
.ascii "UINT_FAST64_MAX (__UINT_FAST64_MAX__)\000"
@@ -4876,7 +4896,7 @@ gpio_write:
.ascii "__ORDER_LITTLE_ENDIAN__ 1234\000"
.LASF155:
.ascii "__FLT_NORM_MAX__ 3.4028234663852886e+38F\000"
.LASF886:
.LASF890:
.ascii "long long unsigned int\000"
.LASF611:
.ascii "UINT_LEAST64_MAX (__UINT_LEAST64_MAX__)\000"
@@ -4906,8 +4926,8 @@ gpio_write:
.ascii "SCNdFAST32 __SCN32FAST(d)\000"
.LASF339:
.ascii "__UHQ_IBIT__ 0\000"
.LASF858:
.ascii "GPIO_MODER_MODER3_BIT 7\000"
.LASF861:
.ascii "GPIO_MODER_MODER3_BIT 6\000"
.LASF60:
.ascii "__INT_FAST16_TYPE__ int\000"
.LASF631:
@@ -4956,11 +4976,11 @@ gpio_write:
.ascii "SCNdFAST8 __SCN8FAST(d)\000"
.LASF576:
.ascii "_UINTPTR_T_DECLARED \000"
.LASF899:
.LASF903:
.ascii "AFRH\000"
.LASF314:
.ascii "__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULK\000"
.LASF898:
.LASF902:
.ascii "AFRL\000"
.LASF273:
.ascii "__ULFRACT_MIN__ 0.0ULR\000"
@@ -4974,7 +4994,7 @@ gpio_write:
.ascii "__INT32_TYPE__ long int\000"
.LASF118:
.ascii "__UINT_LEAST8_MAX__ 0xff\000"
.LASF897:
.LASF901:
.ascii "LCKR\000"
.LASF520:
.ascii "__int20__ +2\000"
@@ -5020,7 +5040,7 @@ gpio_write:
.ascii "__QQ_IBIT__ 0\000"
.LASF763:
.ascii "PRIdLEAST32 __PRI32LEAST(d)\000"
.LASF893:
.LASF897:
.ascii "OTYPER\000"
.LASF811:
.ascii "SCNuLEAST64 __SCN64LEAST(u)\000"
@@ -5040,11 +5060,11 @@ gpio_write:
.ascii "__GNUC_MINOR__ 3\000"
.LASF57:
.ascii "__UINT_LEAST32_TYPE__ long unsigned int\000"
.LASF909:
.LASF913:
.ascii "src/gpio.c\000"
.LASF405:
.ascii "__ARM_FEATURE_NUMERIC_MAXMIN\000"
.LASF870:
.LASF874:
.ascii "GPIO_BASE_ADDR (0x40020000U)\000"
.LASF38:
.ascii "__INTMAX_TYPE__ long long int\000"
@@ -5096,7 +5116,7 @@ gpio_write:
.ascii "__SCN8(x) __INT8 __STRINGIFY(x)\000"
.LASF23:
.ascii "__SIZEOF_SIZE_T__ 4\000"
.LASF871:
.LASF875:
.ascii "GPIO_PORT_OFFSET (0x400U)\000"
.LASF50:
.ascii "__UINT64_TYPE__ long long unsigned int\000"
@@ -5106,7 +5126,7 @@ gpio_write:
.ascii "__INT64_C(c) c ## LL\000"
.LASF699:
.ascii "PRIuFAST8 __PRI8FAST(u)\000"
.LASF867:
.LASF871:
.ascii "GPIO_AFRL_AFRL2_BIT 8\000"
.LASF190:
.ascii "__LDBL_MIN__ 2.2250738585072014e-308L\000"
@@ -5116,7 +5136,7 @@ gpio_write:
.ascii "__ACCUM_IBIT__ 16\000"
.LASF509:
.ascii "unsigned\000"
.LASF895:
.LASF899:
.ascii "PUPDR\000"
.LASF835:
.ascii "SCNuMAX __SCNMAX(u)\000"
@@ -5126,7 +5146,7 @@ gpio_write:
.ascii "_ATTRIBUTE(attrs) __attribute__ (attrs)\000"
.LASF359:
.ascii "__UDA_IBIT__ 32\000"
.LASF906:
.LASF910:
.ascii "mode\000"
.LASF586:
.ascii "INTPTR_MAX (__INTPTR_MAX__)\000"
@@ -5140,7 +5160,7 @@ gpio_write:
.ascii "__UHQ_FBIT__ 16\000"
.LASF443:
.ascii "__ARM_FEATURE_COPROC\000"
.LASF903:
.LASF907:
.ascii "GPIO_MODE_ANALOG\000"
.LASF177:
.ascii "__DBL_HAS_INFINITY__ 1\000"
@@ -5178,7 +5198,7 @@ gpio_write:
.ascii "__FAST8 \000"
.LASF496:
.ascii "__XSI_VISIBLE 0\000"
.LASF896:
.LASF900:
.ascii "BSRR\000"
.LASF794:
.ascii "PRIu64 __PRI64(u)\000"
@@ -5266,7 +5286,7 @@ gpio_write:
.ascii "PRIx32 __PRI32(x)\000"
.LASF278:
.ascii "__LLFRACT_MIN__ (-0.5LLR-0.5LLR)\000"
.LASF890:
.LASF894:
.ascii "uint32_t\000"
.LASF689:
.ascii "PRIxLEAST8 __PRI8LEAST(x)\000"
@@ -5314,13 +5334,13 @@ gpio_write:
.ascii "__INT_LEAST16_TYPE__ short int\000"
.LASF326:
.ascii "__QQ_FBIT__ 7\000"
.LASF875:
.LASF879:
.ascii "PINNUM(pin) (pin & 0b1111)\000"
.LASF768:
.ascii "PRIXLEAST32 __PRI32LEAST(X)\000"
.LASF171:
.ascii "__DBL_MAX__ ((double)1.7976931348623157e+308L)\000"
.LASF880:
.LASF884:
.ascii "short unsigned int\000"
.LASF276:
.ascii "__LLFRACT_FBIT__ 63\000"
@@ -5368,7 +5388,7 @@ gpio_write:
.ascii "__SCN64LEAST(x) __LEAST64 __STRINGIFY(x)\000"
.LASF280:
.ascii "__LLFRACT_EPSILON__ 0x1P-63LLR\000"
.LASF910:
.LASF914:
.ascii "/home/alex/code/own/stm32-falling-sand\000"
.LASF249:
.ascii "__SFRACT_MAX__ 0X7FP-7HR\000"
build/gpio.i
+13 -5
View File
@@ -2003,13 +2003,21 @@ struct gpio {
#define GPIOA ((struct gpio *) GPIOA_BASE_ADDR)
#define GPIO_MODER_MODER3_BIT 7
#define GPIO_MODER_AF_MODE (0b10)
#define GPIO_MODER_MODER8_BIT 16
#define GPIO_MODER_MODER8_MASK (0b11)
#define GPIO_MODER_MODER3_BIT 6
#define GPIO_MODER_MODER3_MASK (0b11)
#define GPIO_MODER_MODER3_AF (0b10)
#define GPIO_MODER_MODER2_BIT 4
#define GPIO_MODER_MODER2_MASK (0b11)
#define GPIO_MODER_MODER2_AF (0b10)
#define GPIO_AFRH_AFRH8_BIT 0
#define GPIO_AFRH_AFRH8_MASK (0b1111)
#define GPIO_AFRH_AFRH8_MCO_1 (0b0000)
#define GPIO_AFRL_AFRL3_BIT 12
@@ -2044,9 +2052,9 @@ typedef enum {
void gpio_set_mode(uint16_t pin, GPIO_MODE mode);
void gpio_write(uint16_t pin,
# 64 "src/gpio.h" 3 4
# 72 "src/gpio.h" 3 4
_Bool
# 64 "src/gpio.h"
# 72 "src/gpio.h"
val);
# 5 "src/gpio.c" 2
build/gpio.o
BIN
View File
Binary file not shown.
build/main.S
+632 -555
View File
File diff suppressed because it is too large Load Diff
build/main.i
+59 -21
View File
@@ -2029,6 +2029,11 @@ struct rcc {
#define RCC_CR_PLLON_ON (1 << RCC_CR_PLLON_BIT)
#define RCC_CR_CSS_BIT 19
#define RCC_CR_CSS_ON (1 << RCC_CR_CSS_BIT)
#define RCC_CR_HSERDY_BIT 17
#define RCC_CR_HSERDY_READY (1 << RCC_CR_HSERDY_BIT)
@@ -2051,6 +2056,7 @@ struct rcc {
#define RCC_PLLCFGR_PLLSRC_BIT 22
#define RCC_PLLCFGR_PLLSRC_HSE (1 << RCC_PLLCFGR_PLLSRC_BIT)
#define RCC_PLLCFGR_PLLSRC_HSI (0 << RCC_PLLCFGR_PLLSRC_BIT)
#define RCC_PLLCFGR_PLLP_BIT 16
#define RCC_PLLCFGR_PLLP_MASK (0b11)
@@ -2070,6 +2076,19 @@ struct rcc {
#define RCC_CFGR_PPRE_DIV_2 (0b100)
#define RCC_CFGR_MCO1_HSI (0b00)
#define RCC_CFGR_MCO1_HSE (0b10)
#define RCC_CFGR_MCO1_PLL (0b11)
#define RCC_CFGR_MCO1_BIT 21
#define RCC_CFGR_MCO1_MASK (0b11)
#define RCC_CFGR_MCO1PRE_DIV4 (0b110)
#define RCC_CFGR_MCO1PRE_BIT 24
#define RCC_CFGR_MCO1PRE_MASK (0b111)
#define RCC_CFGR_PPRE2_BIT 13
#define RCC_CFGR_PPRE2_MASK (0b111)
@@ -2090,6 +2109,7 @@ struct rcc {
#define RCC_CFGR_SWS_MASK (0b11)
#define RCC_CFGR_SW_PLL (0b10)
#define RCC_CFGR_SW_PLL (0b10)
#define RCC_CFGR_SW_BIT 0
@@ -2135,13 +2155,21 @@ struct gpio {
#define GPIOA ((struct gpio *) GPIOA_BASE_ADDR)
#define GPIO_MODER_MODER3_BIT 7
#define GPIO_MODER_AF_MODE (0b10)
#define GPIO_MODER_MODER8_BIT 16
#define GPIO_MODER_MODER8_MASK (0b11)
#define GPIO_MODER_MODER3_BIT 6
#define GPIO_MODER_MODER3_MASK (0b11)
#define GPIO_MODER_MODER3_AF (0b10)
#define GPIO_MODER_MODER2_BIT 4
#define GPIO_MODER_MODER2_MASK (0b11)
#define GPIO_MODER_MODER2_AF (0b10)
#define GPIO_AFRH_AFRH8_BIT 0
#define GPIO_AFRH_AFRH8_MASK (0b1111)
#define GPIO_AFRH_AFRH8_MCO_1 (0b0000)
#define GPIO_AFRL_AFRL3_BIT 12
@@ -2176,9 +2204,9 @@ typedef enum {
void gpio_set_mode(uint16_t pin, GPIO_MODE mode);
void gpio_write(uint16_t pin,
# 64 "src/gpio.h" 3 4
# 72 "src/gpio.h" 3 4
_Bool
# 64 "src/gpio.h"
# 72 "src/gpio.h"
val);
# 6 "src/main.c" 2
# 1 "src/flash.h" 1
@@ -2350,9 +2378,15 @@ static void system_clock_init(void) {
((struct pwr *) (0x40007000U))->CR |= ((0b11) << 14);
((struct rcc *) (0x40023800U))->CR &= ~(1 << 0);
((struct rcc *) (0x40023800U))->CR |= (1 << 16);
((struct rcc *) (0x40023800U))->CR |= (1 << 19);
while (!(((struct rcc *) (0x40023800U))->CR & (1 << 17)));
@@ -2361,10 +2395,11 @@ static void system_clock_init(void) {
((struct rcc *) (0x40023800U))->CR &= ~(1 << 24);
((struct rcc *) (0x40023800U))->PLLCFGR |= (1 << 22);
((struct rcc *) (0x40023800U))->PLLCFGR |= ((25 & (0b111111)) << 0) | ((196 & (0b111111111)) << 6) | ((2 & (0b11)) << 16) | ((4 & (0b1111)) << 24);
((struct rcc *) (0x40023800U))->PLLCFGR |= ((25 & (0b111111)) << 0) | ((192 & (0b111111111)) << 6) | ((2 & (0b11)) << 16) | ((4 & (0b1111)) << 24);
((struct rcc *) (0x40023800U))->CFGR &= ~((0b1111) << 4);
@@ -2383,26 +2418,28 @@ static void system_clock_init(void) {
while (!(((struct rcc *) (0x40023800U))->CR & (1 << 17)));
while (!(((struct rcc *) (0x40023800U))->CR & (1 << 25)));
((struct flash *) (0x40023C00U))->ACR |= (1 <<10);
((struct flash *) (0x40023C00U))->ACR |= (1 <<9);
((struct flash *) (0x40023C00U))->ACR &= ~((0b1111) << 0);
((struct rcc *) (0x40023800U))->CFGR |= ((0x0111) << 0);
((struct rcc *) (0x40023800U))->CFGR &= ~((0b11) << 0);
((struct rcc *) (0x40023800U))->CFGR |= ((0b10) << 0);
# 75 "src/main.c"
((struct rcc *) (0x40023800U))->CFGR |= (((0b10) & (0b11)) << 0);
while (((((struct rcc *) (0x40023800U))->CFGR >> 2) & (0b11)) != (0b10));
((struct rcc *) (0x40023800U))->CR &= ~(1 << 0);
((struct rcc *) (0x40023800U))->CFGR &= ~((0b11) << 21);
((struct rcc *) (0x40023800U))->CFGR |= ((0b00) << 21);
}
int main(void) {
@@ -2419,20 +2456,21 @@ int main(void) {
uint16_t counter = ((struct timer *) (0x40000800U))->CNT;
# 90 "src/main.c" 3 4
# 106 "src/main.c" 3 4
_Bool
# 90 "src/main.c"
# 106 "src/main.c"
led_on =
# 90 "src/main.c" 3 4
# 106 "src/main.c" 3 4
((_Bool)+0u)
# 90 "src/main.c"
# 106 "src/main.c"
;
while(1) {
if ((((struct timer *) (0x40000800U))->CNT - counter) >= 250) {
led_on = !led_on;
gpio_write(led, led_on);
usart2_write("hello, world\n");
usart2_write("U\n");
counter = ((struct timer *) (0x40000800U))->CNT;
}
build/main.o
BIN
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build/timer.S
+269 -210
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File diff suppressed because it is too large Load Diff
build/timer.i
+20
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@@ -2014,6 +2014,11 @@ struct rcc {
#define RCC_CR_PLLON_ON (1 << RCC_CR_PLLON_BIT)
#define RCC_CR_CSS_BIT 19
#define RCC_CR_CSS_ON (1 << RCC_CR_CSS_BIT)
#define RCC_CR_HSERDY_BIT 17
#define RCC_CR_HSERDY_READY (1 << RCC_CR_HSERDY_BIT)
@@ -2036,6 +2041,7 @@ struct rcc {
#define RCC_PLLCFGR_PLLSRC_BIT 22
#define RCC_PLLCFGR_PLLSRC_HSE (1 << RCC_PLLCFGR_PLLSRC_BIT)
#define RCC_PLLCFGR_PLLSRC_HSI (0 << RCC_PLLCFGR_PLLSRC_BIT)
#define RCC_PLLCFGR_PLLP_BIT 16
#define RCC_PLLCFGR_PLLP_MASK (0b11)
@@ -2055,6 +2061,19 @@ struct rcc {
#define RCC_CFGR_PPRE_DIV_2 (0b100)
#define RCC_CFGR_MCO1_HSI (0b00)
#define RCC_CFGR_MCO1_HSE (0b10)
#define RCC_CFGR_MCO1_PLL (0b11)
#define RCC_CFGR_MCO1_BIT 21
#define RCC_CFGR_MCO1_MASK (0b11)
#define RCC_CFGR_MCO1PRE_DIV4 (0b110)
#define RCC_CFGR_MCO1PRE_BIT 24
#define RCC_CFGR_MCO1PRE_MASK (0b111)
#define RCC_CFGR_PPRE2_BIT 13
#define RCC_CFGR_PPRE2_MASK (0b111)
@@ -2075,6 +2094,7 @@ struct rcc {
#define RCC_CFGR_SWS_MASK (0b11)
#define RCC_CFGR_SW_PLL (0b10)
#define RCC_CFGR_SW_PLL (0b10)
#define RCC_CFGR_SW_BIT 0
build/timer.o
BIN
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build/usart.S
+511 -410
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File diff suppressed because it is too large Load Diff
build/usart.i
+47 -13
View File
@@ -2014,6 +2014,11 @@ struct rcc {
#define RCC_CR_PLLON_ON (1 << RCC_CR_PLLON_BIT)
#define RCC_CR_CSS_BIT 19
#define RCC_CR_CSS_ON (1 << RCC_CR_CSS_BIT)
#define RCC_CR_HSERDY_BIT 17
#define RCC_CR_HSERDY_READY (1 << RCC_CR_HSERDY_BIT)
@@ -2036,6 +2041,7 @@ struct rcc {
#define RCC_PLLCFGR_PLLSRC_BIT 22
#define RCC_PLLCFGR_PLLSRC_HSE (1 << RCC_PLLCFGR_PLLSRC_BIT)
#define RCC_PLLCFGR_PLLSRC_HSI (0 << RCC_PLLCFGR_PLLSRC_BIT)
#define RCC_PLLCFGR_PLLP_BIT 16
#define RCC_PLLCFGR_PLLP_MASK (0b11)
@@ -2055,6 +2061,19 @@ struct rcc {
#define RCC_CFGR_PPRE_DIV_2 (0b100)
#define RCC_CFGR_MCO1_HSI (0b00)
#define RCC_CFGR_MCO1_HSE (0b10)
#define RCC_CFGR_MCO1_PLL (0b11)
#define RCC_CFGR_MCO1_BIT 21
#define RCC_CFGR_MCO1_MASK (0b11)
#define RCC_CFGR_MCO1PRE_DIV4 (0b110)
#define RCC_CFGR_MCO1PRE_BIT 24
#define RCC_CFGR_MCO1PRE_MASK (0b111)
#define RCC_CFGR_PPRE2_BIT 13
#define RCC_CFGR_PPRE2_MASK (0b111)
@@ -2075,6 +2094,7 @@ struct rcc {
#define RCC_CFGR_SWS_MASK (0b11)
#define RCC_CFGR_SW_PLL (0b10)
#define RCC_CFGR_SW_PLL (0b10)
#define RCC_CFGR_SW_BIT 0
@@ -2132,13 +2152,21 @@ struct gpio {
#define GPIOA ((struct gpio *) GPIOA_BASE_ADDR)
#define GPIO_MODER_MODER3_BIT 7
#define GPIO_MODER_AF_MODE (0b10)
#define GPIO_MODER_MODER8_BIT 16
#define GPIO_MODER_MODER8_MASK (0b11)
#define GPIO_MODER_MODER3_BIT 6
#define GPIO_MODER_MODER3_MASK (0b11)
#define GPIO_MODER_MODER3_AF (0b10)
#define GPIO_MODER_MODER2_BIT 4
#define GPIO_MODER_MODER2_MASK (0b11)
#define GPIO_MODER_MODER2_AF (0b10)
#define GPIO_AFRH_AFRH8_BIT 0
#define GPIO_AFRH_AFRH8_MASK (0b1111)
#define GPIO_AFRH_AFRH8_MCO_1 (0b0000)
#define GPIO_AFRL_AFRL3_BIT 12
@@ -2173,9 +2201,9 @@ typedef enum {
void gpio_set_mode(uint16_t pin, GPIO_MODE mode);
void gpio_write(uint16_t pin,
# 64 "src/gpio.h" 3 4
# 72 "src/gpio.h" 3 4
_Bool
# 64 "src/gpio.h"
# 72 "src/gpio.h"
val);
# 3 "src/usart.c" 2
# 1 "src/usart.h" 1
@@ -2250,8 +2278,8 @@ void usart2_init(void) {
((struct gpio *) (0x40020000U))->MODER &= ~((0b11) << 4);
((struct gpio *) (0x40020000U))->MODER |= ((0b10) << 4);
((struct gpio *) (0x40020000U))->MODER &= ~((0b11) << 7);
((struct gpio *) (0x40020000U))->MODER |= ((0b10) << 7);
((struct gpio *) (0x40020000U))->MODER &= ~((0b11) << 6);
((struct gpio *) (0x40020000U))->MODER |= ((0b10) << 6);
((struct gpio *) (0x40020000U))->AFRL &= ~((0b1111) << 8);
@@ -2260,19 +2288,25 @@ void usart2_init(void) {
((struct gpio *) (0x40020000U))->AFRL |= ((0b0111) << 12);
((struct gpio *) (0x40020000U))->MODER &= ~((0b11) << 16);
((struct gpio *) (0x40020000U))->MODER |= ((0b10) << 16);
((struct gpio *) (0x40020000U))->AFRH &= ~((0b1111) << 0);
((struct gpio *) (0x40020000U))->AFRH |= ((0b0000) << 0);
((struct rcc *) (0x40023800U))->APB1ENR |= (1 << 17);
((struct usart *) (0x40004400U))->CR1 = 0;
((struct usart *) (0x40004400U))->CR2 = 0;
((struct usart *) (0x40004400U))->CR3 = 0;
# 54 "src/usart.c"
# 55 "src/usart.c"
((struct usart *) (0x40004400U))->BRR &= ~((0b111111111111) << 4);
((struct usart *) (0x40004400U))->BRR |= (0x34 << 4);
((struct usart *) (0x40004400U))->BRR |= (0x68 << 4);
((struct usart *) (0x40004400U))->BRR &= ~((0b111) << 0);
((struct usart *) (0x40004400U))->BRR |= (0x0 << 0);
((struct usart *) (0x40004400U))->BRR |= (0x2AB << 0);
((struct usart *) (0x40004400U))->CR1 |= (1 << 3);
@@ -2288,8 +2322,8 @@ void usart2_write_byte(uint8_t c) {
((struct usart *) (0x40004400U))->DR = c;
while ((((struct usart *) (0x40004400U))->SR & (1 << 7)) == 0);
while (!(((struct usart *) (0x40004400U))->SR & (1 << 6)));
}
void usart2_write(char *buf) {
build/usart.o
BIN
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src/gpio.h
+13 -5
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@@ -21,22 +21,30 @@ struct gpio {
#define GPIOA ((struct gpio *) GPIOA_BASE_ADDR)
// MODER register
#define GPIO_MODER_MODER3_BIT 7 // Bits [7:6]
#define GPIO_MODER_AF_MODE (0b10)
#define GPIO_MODER_MODER8_BIT 16 // Bits [17:16]
#define GPIO_MODER_MODER8_MASK (0b11)
#define GPIO_MODER_MODER3_BIT 6 // Bits [7:6]
#define GPIO_MODER_MODER3_MASK (0b11)
#define GPIO_MODER_MODER3_AF (0b10)
#define GPIO_MODER_MODER2_BIT 4 // Bits [5:4]
#define GPIO_MODER_MODER2_MASK (0b11)
#define GPIO_MODER_MODER2_AF (0b10)
// AFRH register
#define GPIO_AFRH_AFRH8_BIT 0 // Bits [3:0]
#define GPIO_AFRH_AFRH8_MASK (0b1111)
#define GPIO_AFRH_AFRH8_MCO_1 (0b0000) // Alternative function 0 (AF0)
// AFRL register
#define GPIO_AFRL_AFRL3_BIT 12 // Bits [15:12]
#define GPIO_AFRL_AFRL3_MASK (0b1111)
#define GPIO_AFRL_AFRL3_USART2_RX (0b0111) // Alternative function 7
#define GPIO_AFRL_AFRL3_USART2_RX (0b0111) // Alternative function 7 (AF7)
#define GPIO_AFRL_AFRL2_BIT 8 // Bits [11:8]
#define GPIO_AFRL_AFRL2_MASK (0b1111)
#define GPIO_AFRL_AFRL2_USART2_TX (0b0111) // Alternative function 7
#define GPIO_AFRL_AFRL2_USART2_TX (0b0111) // Alternative function 7 (AF7)
src/main.c
+24 -7
View File
@@ -18,9 +18,15 @@ static void system_clock_init(void) {
PWR->CR &= ~(PWR_CR_VOS_MASK << PWR_CR_VOS_BIT);
PWR->CR |= (PWR_SCALE3 << PWR_CR_VOS_BIT);
// Turn off HSI (which is on by default)
RCC->CR &= ~RCC_CR_HSION_ON;
// Turn on HSE
RCC->CR |= RCC_CR_HSEON_ON;
// Turn on clock security system
RCC->CR |= RCC_CR_CSS_ON;
// Wait indefinitely for HSE to be ready
// TODO indicate error/timeout somehow?
while (!(RCC->CR & RCC_CR_HSERDY_READY));
@@ -30,6 +36,7 @@ static void system_clock_init(void) {
RCC->CR &= ~RCC_CR_PLLON_ON;
// Set HSE as PLL source
/* RCC->PLLCFGR |= RCC_PLLCFGR_PLLSRC_HSE; */
RCC->PLLCFGR |= RCC_PLLCFGR_PLLSRC_HSE;
// Settings to achieve system clock of 96Mhz
@@ -59,19 +66,28 @@ static void system_clock_init(void) {
FLASH->ACR |= FLASH_ACR_ICEN_ENABLE;
// Set latency to be 3 wait states (TODO: understand why exactly 3)
FLASH->ACR &= ~(FLASH_ACR_LATENCY_MASK << FLASH_ACR_LATENCY_BIT);
RCC->CFGR |= (FLASH_ACR_LATENCY_3_WAIT_STATES << FLASH_ACR_LATENCY_BIT);
/* FLASH->ACR &= ~(FLASH_ACR_LATENCY_MASK << FLASH_ACR_LATENCY_BIT); */
/* RCC->CFGR |= (FLASH_ACR_LATENCY_3_WAIT_STATES << FLASH_ACR_LATENCY_BIT); */
// Use PLL as system clock
RCC->CFGR &= ~(RCC_CFGR_SW_MASK << RCC_CFGR_SW_BIT);
RCC->CFGR |= (RCC_CFGR_SW_PLL << RCC_CFGR_SW_BIT);
/* RCC->CFGR &= ~(RCC_CFGR_SW_MASK << RCC_CFGR_SW_BIT); */
/* RCC->CFGR |= (RCC_CFGR_SW_PLL << RCC_CFGR_SW_BIT); */
RCC->CFGR |= RCC_CFGR_SW(RCC_CFGR_SW_PLL);
// Wait indefinitely for PLL clock to be selected
// TODO indicate error/timeout somehow?
while (((RCC->CFGR >> RCC_CFGR_SWS_BIT) & RCC_CFGR_SWS_MASK) != RCC_CFGR_SWS_PLL);
// Turn off HSI (which is on by default)
RCC->CR &= ~RCC_CR_HSION_ON;
// Output HSE clock
RCC->CFGR &= ~(RCC_CFGR_MCO1_MASK << RCC_CFGR_MCO1_BIT);
/* RCC->CFGR |= (RCC_CFGR_MCO1_HSE << RCC_CFGR_MCO1_BIT); */
/* RCC->CFGR |= (RCC_CFGR_MCO1_PLL << RCC_CFGR_MCO1_BIT); */
RCC->CFGR |= (RCC_CFGR_MCO1_HSI << RCC_CFGR_MCO1_BIT);
/* RCC->CFGR &= ~(RCC_CFGR_MCO1PRE_MASK << RCC_CFGR_MCO1PRE_BIT); */
/* RCC->CFGR |= (RCC_CFGR_MCO1PRE_DIV4 << RCC_CFGR_MCO1PRE_BIT); */
}
int main(void) {
@@ -89,11 +105,12 @@ int main(void) {
uint16_t counter = TIM4->CNT;
bool led_on = false;
while(1) {
/* usart2_write("U\n"); */
if ((TIM4->CNT - counter) >= 250) {
led_on = !led_on;
gpio_write(led, led_on);
usart2_write("hello, world\n");
usart2_write("U\n");
counter = TIM4->CNT;
}
src/rcc.h
+20
View File
@@ -46,6 +46,11 @@ struct rcc {
#define RCC_CR_PLLON_BIT 24
#define RCC_CR_PLLON_ON (1 << RCC_CR_PLLON_BIT)
// Clock security system
#define RCC_CR_CSS_BIT 19
#define RCC_CR_CSS_ON (1 << RCC_CR_CSS_BIT)
// HSE clock ready flag
#define RCC_CR_HSERDY_BIT 17
#define RCC_CR_HSERDY_READY (1 << RCC_CR_HSERDY_BIT)
@@ -69,6 +74,7 @@ struct rcc {
#define RCC_PLLCFGR_PLLSRC_BIT 22
#define RCC_PLLCFGR_PLLSRC_HSE (1 << RCC_PLLCFGR_PLLSRC_BIT)
#define RCC_PLLCFGR_PLLSRC_HSI (0 << RCC_PLLCFGR_PLLSRC_BIT)
#define RCC_PLLCFGR_PLLP_BIT 16 // Bits [17:16]
#define RCC_PLLCFGR_PLLP_MASK (0b11)
@@ -87,6 +93,19 @@ struct rcc {
#define RCC_CFGR_PPRE_DIV_NONE 0
#define RCC_CFGR_PPRE_DIV_2 (0b100)
// Microcontroller clock output 1
#define RCC_CFGR_MCO1_HSI (0b00)
#define RCC_CFGR_MCO1_HSE (0b10)
#define RCC_CFGR_MCO1_PLL (0b11)
#define RCC_CFGR_MCO1_BIT 21 // Bits [22:21]
#define RCC_CFGR_MCO1_MASK (0b11)
#define RCC_CFGR_MCO1PRE_DIV4 (0b110)
#define RCC_CFGR_MCO1PRE_BIT 24 // Bits [26:24]
#define RCC_CFGR_MCO1PRE_MASK (0b111)
// APB2
#define RCC_CFGR_PPRE2_BIT 13 // Bits [15:13]
#define RCC_CFGR_PPRE2_MASK (0b111)
@@ -109,6 +128,7 @@ struct rcc {
// System clock switch
#define RCC_CFGR_SW_PLL (0b10)
#define RCC_CFGR_SW_PLL (0b10)
#define RCC_CFGR_SW_BIT 0 // Bits [1:0]
#define RCC_CFGR_SW_MASK (0b11)
src/usart.c
+19 -20
View File
@@ -9,9 +9,9 @@ void usart2_init(void) {
// Configure PA2 and PA3 (USART2 pins) to use alternative functions
// file:///home/alex/sync/org/stm32-sand/stm32f411ce.pdf#page=48
GPIOA->MODER &= ~(GPIO_MODER_MODER2_MASK << GPIO_MODER_MODER2_BIT);
GPIOA->MODER |= (GPIO_MODER_MODER2_AF << GPIO_MODER_MODER2_BIT);
GPIOA->MODER |= (GPIO_MODER_AF_MODE << GPIO_MODER_MODER2_BIT);
GPIOA->MODER &= ~(GPIO_MODER_MODER3_MASK << GPIO_MODER_MODER3_BIT);
GPIOA->MODER |= (GPIO_MODER_MODER3_AF << GPIO_MODER_MODER3_BIT);
GPIOA->MODER |= (GPIO_MODER_AF_MODE << GPIO_MODER_MODER3_BIT);
// Set pin alternative modes to use USART
GPIOA->AFRL &= ~(GPIO_AFRL_AFRL2_MASK << GPIO_AFRL_AFRL2_BIT);
@@ -19,6 +19,14 @@ void usart2_init(void) {
GPIOA->AFRL &= ~(GPIO_AFRL_AFRL3_MASK << GPIO_AFRL_AFRL3_BIT);
GPIOA->AFRL |= (GPIO_AFRL_AFRL3_USART2_RX << GPIO_AFRL_AFRL3_BIT);
// Configure PA8 to output HSE (MCO1)
GPIOA->MODER &= ~(GPIO_MODER_MODER8_MASK << GPIO_MODER_MODER8_BIT);
GPIOA->MODER |= (GPIO_MODER_AF_MODE << GPIO_MODER_MODER8_BIT);
// Set pin alternative mode to use MCO1
GPIOA->AFRH &= ~(GPIO_AFRH_AFRH8_MASK << GPIO_AFRH_AFRH8_BIT);
GPIOA->AFRH |= (GPIO_AFRH_AFRH8_MCO_1 << GPIO_AFRH_AFRH8_BIT);
// Enable USART
RCC->APB1ENR |= RCC_APB1ENR_USART2EN_ENABLE;
@@ -30,33 +38,24 @@ void usart2_init(void) {
// Calculate Baud rate:
// baud = f_clck / (8 * (2 - OVER8) * USARTDIV) =>
// (8 * (2 - OVER8) * USARTDIV) = f_clock / baud =>
// baud * (8 * (2 - OVER8) * USARTDIV) = f_clock =>
// USARTDIV = (f_clock / (baud * (8 * (2 - OVER8)))
// Target Baud rate = 115200, f_clock = 48MHz
// Target Baud rate = 115200, f_clock = 48MHz,OVER8 = 0
// With OVER8 = 1 (oversampling by 8)
// USARTDIV = (48E6 / (115200 * (8 * (2 - 0)))) = 26.0416666
// USARTDIV = (48E6 / (115200 * (8 * 2))) = 26.0416666
// mantissa = 26
// fraction = 0.041666 * 8 = 0.33328 ~= 0
// fraction = 0.041666 * 16 = 0.666656 ~= 1
// rounding fraction up: USARTDIV = 26
// baud = 48E6 / (8 * 2 * 26) = 115384.61538461539
// error of 0.001% (115384.61538461539 / 115200 ) = 1.001602564102564
// baud = f_clck / (8 * (2 - OVER8) * USARTDIV) */
// baud * ((8 * (2 - OVER8) * USARTDIV)) = f_clck */
// 393400 * (8 * 2 * 26) = 163654400
/* USART2->CR1 |= USART_CR1_OVER8_8; */
USART2->BRR &= ~(USART_BRR_MANTISSA_MASK << USART_BRR_MANTISSA_BIT);
USART2->BRR |= (0x34 << USART_BRR_MANTISSA_BIT);
/* USART2->BRR |= (0x69 << USART_BRR_MANTISSA_BIT); */
/* USART2->BRR |= (0x1A << USART_BRR_MANTISSA_BIT); */
USART2->BRR &= ~(USART_BRR_FRACTION_MASK << USART_BRR_FRACTION_BIT);
USART2->BRR |= (0x0 << USART_BRR_FRACTION_BIT);
USART2->BRR |= (0x68 << USART_BRR_MANTISSA_BIT);
/* USART2->BRR &= ~(USART_BRR_FRACTION_MASK << USART_BRR_FRACTION_BIT); */
USART2->BRR |= (0x2AB << USART_BRR_FRACTION_BIT);
// Enable transmitter and receiver
USART2->CR1 |= USART_CR1_TE_ENABLE;
@@ -72,8 +71,8 @@ void usart2_write_byte(uint8_t c) {
USART2->DR = c;
// Wait indefinitely for transmission to be ready for data
while ((USART2->SR & USART_SR_TXE_TRANSMITTED) == 0);
/* while (!(USART2->SR & USART_SR_TC_COMPLETED)); */
/* while ((USART2->SR & USART_SR_TXE_TRANSMITTED) == 0); */
while (!(USART2->SR & USART_SR_TC_COMPLETED));
}
void usart2_write(char *buf) {
src/usart.h
+2 -2
View File
@@ -49,10 +49,10 @@ struct usart {
// BRR Register
#define USART_BRR_MANTISSA_BIT 4 // Bits [15:4]
#define USART_BRR_MANTISSA_MASK (0b111111111111) // Bits [15:4]
#define USART_BRR_MANTISSA_MASK (0b111111111111)
#define USART_BRR_FRACTION_BIT 0 // Bits [3:0]
#define USART_BRR_FRACTION_MASK (0b111) // Bits [3:0]
#define USART_BRR_FRACTION_MASK (0b111)
void usart2_init(void);
void usart2_start(void);