wip
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@@ -2082,9 +2082,17 @@ struct rcc {
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#define RCC_CFGR_SW(clock) ((clock & RCC_CFGR_SW_MASK) << RCC_CFGR_SW_BIT)
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#define RCC_AHB1ENR_GPIOAEN_BIT 0
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#define RCC_AHB1ENR_GPIOAEN_ENABLE (1 << RCC_AHB1ENR_GPIOAEN_BIT)
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#define RCC_APB1ENR_PWREN_BIT 28
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#define RCC_APB1ENR_PWREN_CLOCK_ENABLE (1 << RCC_APB1ENR_PWREN_BIT)
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#define RCC_APB1ENR_USART2EN_BIT 17
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#define RCC_APB1ENR_USART2EN_ENABLE (1 << RCC_APB1ENR_USART2EN_BIT)
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#define RCC_APB1ENR_TIM4_BIT 2
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#define RCC_APB1ENR_TIM4_ENABLE (1 << RCC_APB1ENR_TIM4_BIT)
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# 2 "src/timer.c" 2
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@@ -2120,8 +2128,8 @@ struct timer {
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#define TIM4_BASE_ADDR (0x40000800U)
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#define TIM4 ((struct timer *) TIM4_BASE_ADDR)
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#define TIM4_CR_CEN_BIT 0
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#define TIM4_ENABLE (1 << TIM4_CR_CEN_BIT)
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#define TIM_CR1_CEN_BIT 0
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#define TIM_ENABLE (1 << TIM_CR1_CEN_BIT)
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void tim4_init(void);
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void tim4_start(void);
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