diff --git a/src/flash.h b/src/flash.h
index aa17358..6201b15 100644
--- a/src/flash.h
+++ b/src/flash.h
@@ -25,7 +25,7 @@ struct flash {
 #define FLASH_ACR_ICEN_ENABLE (1 <<FLASH_ACR_ICEN_BIT)
 
 // Latency
-#define FLASH_ACR_LATENCY_3_WAIT_STATES (0x0111)
+#define FLASH_ACR_LATENCY_3_WAIT_STATES (0b0011)
 
 #define FLASH_ACR_LATENCY_BIT 0 // Bits [3:0]
 #define FLASH_ACR_LATENCY_MASK (0b1111)
diff --git a/src/main.c b/src/main.c
index 634d4d0..37fa33f 100644
--- a/src/main.c
+++ b/src/main.c
@@ -61,9 +61,10 @@ static void system_clock_init(void) {
   FLASH->ACR |= FLASH_ACR_DCEN_ENABLE;
   FLASH->ACR |= FLASH_ACR_ICEN_ENABLE;
 
+  // TODO breaks with these flash settings on; turning off for now
   // Set latency to be 3 wait states (TODO: understand why exactly 3)
-  FLASH->ACR &= ~(FLASH_ACR_LATENCY_MASK << FLASH_ACR_LATENCY_BIT);
-  RCC->CFGR |= (FLASH_ACR_LATENCY_3_WAIT_STATES << FLASH_ACR_LATENCY_BIT);
+  /* FLASH->ACR &= ~(FLASH_ACR_LATENCY_MASK << FLASH_ACR_LATENCY_BIT); */
+  /* RCC->CFGR |= (FLASH_ACR_LATENCY_3_WAIT_STATES << FLASH_ACR_LATENCY_BIT); */
 
   // Use PLL as system clock
   RCC->CFGR |= RCC_CFGR_SW(RCC_CFGR_SW_PLL);