This commit is contained in:
Alexander Heldt
2024-12-30 16:58:26 +01:00
parent 9e4aaeabd5
commit 953cc58655
26 changed files with 10968 additions and 1361 deletions
+33 -4
View File
@@ -1,5 +1,5 @@
# 0 "src/timer.c"
# 1 "/home/alex/code/own/c-compile-experiments//"
# 1 "/home/alex/code/own/stm32-falling-sand//"
# 0 "<built-in>"
#define __STDC__ 1
# 0 "<built-in>"
@@ -2014,6 +2014,11 @@ struct rcc {
#define RCC_CR_PLLON_ON (1 << RCC_CR_PLLON_BIT)
#define RCC_CR_CSS_BIT 19
#define RCC_CR_CSS_ON (1 << RCC_CR_CSS_BIT)
#define RCC_CR_HSERDY_BIT 17
#define RCC_CR_HSERDY_READY (1 << RCC_CR_HSERDY_BIT)
@@ -2036,6 +2041,7 @@ struct rcc {
#define RCC_PLLCFGR_PLLSRC_BIT 22
#define RCC_PLLCFGR_PLLSRC_HSE (1 << RCC_PLLCFGR_PLLSRC_BIT)
#define RCC_PLLCFGR_PLLSRC_HSI (0 << RCC_PLLCFGR_PLLSRC_BIT)
#define RCC_PLLCFGR_PLLP_BIT 16
#define RCC_PLLCFGR_PLLP_MASK (0b11)
@@ -2055,6 +2061,21 @@ struct rcc {
#define RCC_CFGR_PPRE_DIV_2 (0b100)
#define RCC_CFGR_MCO1_HSI (0b00)
#define RCC_CFGR_MCO1_HSE (0b10)
#define RCC_CFGR_MCO1_PLL (0b11)
#define RCC_CFGR_MCO1_BIT 21
#define RCC_CFGR_MCO1_MASK (0b11)
#define RCC_CFGR_MCO1PRE_DIV5 (0b111)
#define RCC_CFGR_MCO1PRE_DIV4 (0b110)
#define RCC_CFGR_MCO1PRE_DIV2 (0b100)
#define RCC_CFGR_MCO1PRE_BIT 24
#define RCC_CFGR_MCO1PRE_MASK (0b111)
#define RCC_CFGR_PPRE2_BIT 13
#define RCC_CFGR_PPRE2_MASK (0b111)
@@ -2082,9 +2103,17 @@ struct rcc {
#define RCC_CFGR_SW(clock) ((clock & RCC_CFGR_SW_MASK) << RCC_CFGR_SW_BIT)
#define RCC_AHB1ENR_GPIOAEN_BIT 0
#define RCC_AHB1ENR_GPIOAEN_ENABLE (1 << RCC_AHB1ENR_GPIOAEN_BIT)
#define RCC_APB1ENR_PWREN_BIT 28
#define RCC_APB1ENR_PWREN_CLOCK_ENABLE (1 << RCC_APB1ENR_PWREN_BIT)
#define RCC_APB1ENR_USART2EN_BIT 17
#define RCC_APB1ENR_USART2EN_ENABLE (1 << RCC_APB1ENR_USART2EN_BIT)
#define RCC_APB1ENR_TIM4_BIT 2
#define RCC_APB1ENR_TIM4_ENABLE (1 << RCC_APB1ENR_TIM4_BIT)
# 2 "src/timer.c" 2
@@ -2120,8 +2149,8 @@ struct timer {
#define TIM4_BASE_ADDR (0x40000800U)
#define TIM4 ((struct timer *) TIM4_BASE_ADDR)
#define TIM4_CR_CEN_BIT 0
#define TIM4_ENABLE (1 << TIM4_CR_CEN_BIT)
#define TIM_CR1_CEN_BIT 0
#define TIM_ENABLE (1 << TIM_CR1_CEN_BIT)
void tim4_init(void);
void tim4_start(void);
@@ -2137,7 +2166,7 @@ void tim4_init(void) {
((struct timer *) (0x40000800U))->PSC = (uint16_t) 48000 - 1;
((struct timer *) (0x40000800U))->PSC = (uint16_t) 96000 - 1;
((struct timer *) (0x40000800U))->ARR = (uint16_t) 0xFFFF;