From a1c43ad21cb093684ef198ddf6b8b2cb780f6a0d Mon Sep 17 00:00:00 2001
From: Alexander Heldt <me@alexanderheldt.se>
Date: Mon, 30 Dec 2024 11:45:04 +0100
Subject: [PATCH] `TIM4` runs at 96MHz, not 48MHz

---
 build/final.elf | Bin 55108 -> 55108 bytes
 build/timer.S   |   2 +-
 build/timer.i   |   2 +-
 build/timer.o   | Bin 44604 -> 44604 bytes
 src/timer.c     |   4 ++--
 5 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/build/final.elf b/build/final.elf
index 8cba364732a74e2e56edd6d791aeabfe6b308f06..840b7af434e4450775f756fbc25e4221f3af23aa 100755
GIT binary patch
delta 19
bcmX@Ij`_$s<_+saSlmDTPujdmWYQr3UxNwA

delta 19
bcmX@Ij`_$s<_+saSiHa08*SbsGU*TiTPF!1

diff --git a/build/timer.S b/build/timer.S
index 25a5850..d8141ff 100644
--- a/build/timer.S
+++ b/build/timer.S
@@ -56,7 +56,7 @@ tim4_init:
 	.loc 1 14 35
 	ldr	r3, .L2+4
 	.loc 1 14 41
-	movw	r2, #47999
+	movw	r2, #30463
 	str	r2, [r3, #40]
 	.loc 1 17 35
 	ldr	r3, .L2+4
diff --git a/build/timer.i b/build/timer.i
index c8a2bbe..0f9db82 100644
--- a/build/timer.i
+++ b/build/timer.i
@@ -2137,7 +2137,7 @@ void tim4_init(void) {
 
 
 
-  ((struct timer *) (0x40000800U))->PSC = (uint16_t) 48000 - 1;
+  ((struct timer *) (0x40000800U))->PSC = (uint16_t) 96000 - 1;
 
 
   ((struct timer *) (0x40000800U))->ARR = (uint16_t) 0xFFFF;
diff --git a/build/timer.o b/build/timer.o
index 917c295c2f3905e439882f5ce14c4ddc956e75cf..7cca30663621c6357433acb253d2715ead344e3b 100644
GIT binary patch
delta 17
ZcmdmUhiT6prU}1T+&}$K+W60IEdW=r3HJa1

delta 17
ZcmdmUhiT6prU}1TyuZ~OZTx4q764QH2~Pk3

diff --git a/src/timer.c b/src/timer.c
index 0bec1bd..971b392 100644
--- a/src/timer.c
+++ b/src/timer.c
@@ -10,8 +10,8 @@ void tim4_init(void) {
   TIM4->CR2 = 0x0000;
 
   // Set prescaler
-  // f_clk = 48MHz -> /48000 = 1KHz counting frequency = 1ms
-  TIM4->PSC = (uint16_t) 48000 - 1;
+  // f_clk = 96MHz -> 96E6/96E3 = 1E3 = 1KHz counting frequency = 1ms
+  TIM4->PSC = (uint16_t) 96000 - 1;
 
   // Set ARR to maximum value to get 1ms between updates
   TIM4->ARR = (uint16_t) 0xFFFF;