From a63527a997013bf723491b5686710edd1dd2eb1b Mon Sep 17 00:00:00 2001
From: Alexander Heldt <me@alexanderheldt.se>
Date: Mon, 30 Dec 2024 11:46:10 +0100
Subject: [PATCH] Correctly check PLL readiness

---
 build/final.elf | Bin 55108 -> 55108 bytes
 build/main.S    |   2 +-
 build/main.i    |   2 +-
 build/main.o    | Bin 48592 -> 48592 bytes
 src/main.c      |   2 +-
 5 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/build/final.elf b/build/final.elf
index 840b7af434e4450775f756fbc25e4221f3af23aa..5f46cac09cd12977bdc5da13aab988698f597673 100755
GIT binary patch
delta 18
acmX@Ij`_$s<_(O(%pVwvH?s&k9034FAqL|B

delta 18
acmX@Ij`_$s<_(O(%wHIcH?s&k9034D!3L)Q

diff --git a/build/main.S b/build/main.S
index 4eb459c..2f2ba27 100644
--- a/build/main.S
+++ b/build/main.S
@@ -150,7 +150,7 @@ system_clock_init:
 	ldr	r3, .L5
 	ldr	r3, [r3]
 	.loc 1 54 47 discriminator 1
-	and	r3, r3, #131072
+	and	r3, r3, #33554432
 	.loc 1 54 10 discriminator 1
 	cmp	r3, #0
 	beq	.L3
diff --git a/build/main.i b/build/main.i
index e6e6844..5757b32 100644
--- a/build/main.i
+++ b/build/main.i
@@ -2288,7 +2288,7 @@ static void system_clock_init(void) {
 
 
 
-  while (!(((struct rcc *) (0x40023800U))->CR & (1 << 17)));
+  while (!(((struct rcc *) (0x40023800U))->CR & (1 << 25)));
 
 
   ((struct flash *) (0x40023C00U))->ACR |= (1 <<10);
diff --git a/build/main.o b/build/main.o
index 87460c913e63da9781041fd3d1a7fc5add2179b9..7b6ef1767ddea45b911ae85cf27403458f72408b 100644
GIT binary patch
delta 18
acmccco9V)DrVU3KnLjWTZ$81uu?GNK{Rp=J

delta 18
acmccco9V)DrVU3KnZGa?Z$81uu?GNJod|mX

diff --git a/src/main.c b/src/main.c
index 82c27f9..230a8e5 100644
--- a/src/main.c
+++ b/src/main.c
@@ -51,7 +51,7 @@ static void system_clock_init(void) {
 
   // Wait indefinitely for PLL to be ready
   // TODO indicate error/timeout somehow?
-  while (!(RCC->CR & RCC_CR_HSERDY_READY));
+  while (!(RCC->CR & RCC_CR_PLLRDY_LOCKED));
 
   // Enable caching of instructions and data
   FLASH->ACR |= FLASH_ACR_DCEN_ENABLE;