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base: alex/stm32-falling-sand:2f4d38a0d8cb288e534d1835f9f5649d7c9ff3a1
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alex/stm32-falling-sand:main alex/stm32-falling-sand:uart
..
compare: alex/stm32-falling-sand:0bc9e2bd4a0971508af86725b99d401f92309fdb
Branches Tags
alex/stm32-falling-sand:main alex/stm32-falling-sand:uart

1 Commits
2f4d38a0d8 .. 0bc9e2bd4a

Author SHA1 Message Date
Alexander Heldt 0bc9e2bd4a wip 2024-09-05 19:32:35 +02:00
24 changed files with 1676 additions and 2308 deletions
Expand all files Collapse all files
README.md
-35
View File
@@ -1,35 +0,0 @@
# Falling sand on the STM32F411CE
## Building
Run
```sh
make build
```
## Probe for the board
Run
```sh
st-info --probe
```
## Flashing
Run
```sh
make flash
```
## Debugging
### `st-info --probe` shows 0KB flash
```
> sudo st-info --probe
Found 1 stlink programmers
version: V2J43S28
serial: 0671FF343056363043090732
flash: 0 (pagesize: 16384) <--- 0KB flash
sram: 131072
chipid: 0x431
dev-type: STM32F411xC_xE
```
This can happen when the flash is locked. One way to unlock it is to erase the entire chip via the
Windows application `ST-Link Util`.
build/final.elf
BIN
View File
Binary file not shown.
build/final.elf.map
+165 -171
View File
@@ -53,7 +53,7 @@ Discarded input sections
.debug_macro 0x00000000 0x89 build/main.o .debug_macro 0x00000000 0x89 build/main.o
.debug_macro 0x00000000 0x4cc build/main.o .debug_macro 0x00000000 0x4cc build/main.o
.debug_macro 0x00000000 0x22 build/main.o .debug_macro 0x00000000 0x22 build/main.o
.debug_macro 0x00000000 0xa0 build/main.o .debug_macro 0x00000000 0x88 build/main.o
.group 0x00000000 0xc build/startup.o .group 0x00000000 0xc build/startup.o
.group 0x00000000 0xc build/startup.o .group 0x00000000 0xc build/startup.o
.group 0x00000000 0xc build/startup.o .group 0x00000000 0xc build/startup.o
@@ -128,9 +128,9 @@ Discarded input sections
.debug_macro 0x00000000 0x1df build/usart.o .debug_macro 0x00000000 0x1df build/usart.o
.debug_macro 0x00000000 0x89 build/usart.o .debug_macro 0x00000000 0x89 build/usart.o
.debug_macro 0x00000000 0x4cc build/usart.o .debug_macro 0x00000000 0x4cc build/usart.o
.debug_macro 0x00000000 0x191 build/usart.o .debug_macro 0x00000000 0x13e build/usart.o
.debug_macro 0x00000000 0x22 build/usart.o .debug_macro 0x00000000 0x22 build/usart.o
.debug_macro 0x00000000 0x82 build/usart.o .debug_macro 0x00000000 0x76 build/usart.o
Memory Configuration Memory Configuration
@@ -157,7 +157,7 @@ LOAD build/usart.o
0x08000000 interrupt_vector_table 0x08000000 interrupt_vector_table
0x08000198 . = ALIGN (0x4) 0x08000198 . = ALIGN (0x4)
.text 0x08000198 0x4f8 .text 0x08000198 0x4b0
0x08000198 . = ALIGN (0x4) 0x08000198 . = ALIGN (0x4)
*(.text) *(.text)
*(.text.*) *(.text.*)
@@ -169,129 +169,123 @@ LOAD build/usart.o
0x080001fa gpio_write 0x080001fa gpio_write
*fill* 0x08000246 0x2 *fill* 0x08000246 0x2
.text.system_clock_init .text.system_clock_init
0x08000248 0x13c build/main.o 0x08000248 0x144 build/main.o
.text.main 0x08000384 0x9c build/main.o .text.main 0x0800038c 0x98 build/main.o
0x08000384 main 0x0800038c main
.text.init_memory .text.init_memory
0x08000420 0x64 build/startup.o 0x08000424 0x64 build/startup.o
0x08000420 init_memory 0x08000424 init_memory
.text.reset 0x08000484 0x10 build/startup.o .text.reset 0x08000488 0x10 build/startup.o
0x08000484 reset 0x08000488 reset
.text.default_handler .text.default_handler
0x08000494 0x8 build/startup.o 0x08000498 0x8 build/startup.o
0x08000494 exti0 0x08000498 exti0
0x08000494 debug_monitor 0x08000498 debug_monitor
0x08000494 rcc 0x08000498 rcc
0x08000494 x 0x08000498 x
0x08000494 sdio 0x08000498 sdio
0x08000494 usage_fault 0x08000498 usage_fault
0x08000494 tim1_up_tim10 0x08000498 tim1_up_tim10
0x08000494 usart1 0x08000498 usart1
0x08000494 i2c3_er 0x08000498 i2c3_er
0x08000494 spi2 0x08000498 spi2
0x08000494 dma1_stream1 0x08000498 dma1_stream1
0x08000494 bus_fault 0x08000498 bus_fault
0x08000494 spi5 0x08000498 spi5
0x08000494 exti3 0x08000498 exti3
0x08000494 dma2_stream5 0x08000498 dma2_stream5
0x08000494 tim2 0x08000498 tim2
0x08000494 dma1_stream6 0x08000498 dma1_stream6
0x08000494 default_handler 0x08000498 default_handler
0x08000494 i2c1_er 0x08000498 i2c1_er
0x08000494 hard_fault 0x08000498 hard_fault
0x08000494 usart6 0x08000498 usart6
0x08000494 exti15_10 0x08000498 exti15_10
0x08000494 usart2 0x08000498 usart2
0x08000494 pend_sv 0x08000498 pend_sv
0x08000494 i2c1_ev 0x08000498 i2c1_ev
0x08000494 wwdg 0x08000498 wwdg
0x08000494 adc 0x08000498 adc
0x08000494 rtc_alarm 0x08000498 rtc_alarm
0x08000494 spi3 0x08000498 spi3
0x08000494 exti1 0x08000498 exti1
0x08000494 mem_manage 0x08000498 mem_manage
0x08000494 dma2_stream1 0x08000498 dma2_stream1
0x08000494 dma1_stream2 0x08000498 dma1_stream2
0x08000494 dma2_stream3 0x08000498 dma2_stream3
0x08000494 sv_call 0x08000498 sv_call
0x08000494 tim3 0x08000498 tim3
0x08000494 otg_fs 0x08000498 otg_fs
0x08000494 dma1_stream5 0x08000498 dma1_stream5
0x08000494 dma2_stream6 0x08000498 dma2_stream6
0x08000494 flash 0x08000498 flash
0x08000494 tamp_stamp 0x08000498 tamp_stamp
0x08000494 i2c3_ev 0x08000498 i2c3_ev
0x08000494 rtc_wkup 0x08000498 rtc_wkup
0x08000494 dma2_stream0 0x08000498 dma2_stream0
0x08000494 pvd 0x08000498 pvd
0x08000494 fpu 0x08000498 fpu
0x08000494 exti4 0x08000498 exti4
0x08000494 exti2 0x08000498 exti2
0x08000494 spi1 0x08000498 spi1
0x08000494 dma1_stream0 0x08000498 dma1_stream0
0x08000494 tim1_brk_tim9 0x08000498 tim1_brk_tim9
0x08000494 i2c2_ev 0x08000498 i2c2_ev
0x08000494 otg_fs_wkup 0x08000498 otg_fs_wkup
0x08000494 spi4 0x08000498 spi4
0x08000494 dma2_stream2 0x08000498 dma2_stream2
0x08000494 tim1_cc 0x08000498 tim1_cc
0x08000494 tim1_trg_com_tim11 0x08000498 tim1_trg_com_tim11
0x08000494 exti9_5 0x08000498 exti9_5
0x08000494 dma1_stream3 0x08000498 dma1_stream3
0x08000494 dma2_stream4 0x08000498 dma2_stream4
0x08000494 i2c2_er 0x08000498 i2c2_er
0x08000494 dma2_stream7 0x08000498 dma2_stream7
0x08000494 dma1_stream7 0x08000498 dma1_stream7
0x08000494 nmi 0x08000498 nmi
0x08000494 systick 0x08000498 systick
0x08000494 tim4 0x08000498 tim4
0x08000494 tim5 0x08000498 tim5
0x08000494 dma1_stream4 0x08000498 dma1_stream4
.text.tim4_init .text.tim4_init
0x0800049c 0x40 build/timer.o 0x080004a0 0x40 build/timer.o
0x0800049c tim4_init 0x080004a0 tim4_init
.text.tim4_start .text.tim4_start
0x080004dc 0x20 build/timer.o 0x080004e0 0x20 build/timer.o
0x080004dc tim4_start 0x080004e0 tim4_start
.text.usart2_init .text.usart2_init
0x080004fc 0x114 build/usart.o 0x08000500 0xf8 build/usart.o
0x080004fc usart2_init 0x08000500 usart2_init
.text.usart2_start .text.usart2_start
0x08000610 0x20 build/usart.o 0x080005f8 0x20 build/usart.o
0x08000610 usart2_start 0x080005f8 usart2_start
.text.usart2_write_byte .text.usart2_write_byte
0x08000630 0x30 build/usart.o 0x08000618 0x30 build/usart.o
0x08000630 usart2_write_byte 0x08000618 usart2_write_byte
.text.usart2_write
0x08000660 0x2a build/usart.o
0x08000660 usart2_write
*(.rodata) *(.rodata)
*fill* 0x0800068a 0x2
.rodata 0x0800068c 0x3 build/main.o
*(.rodata.*) *(.rodata.*)
0x08000690 . = ALIGN (0x4) 0x08000648 . = ALIGN (0x4)
*fill* 0x0800068f 0x1 0x08000648 _data_addr = LOADADDR (.data)
0x08000690 _data_addr = LOADADDR (.data)
.glue_7 0x08000690 0x0 .glue_7 0x08000648 0x0
.glue_7 0x08000690 0x0 linker stubs .glue_7 0x08000648 0x0 linker stubs
.glue_7t 0x08000690 0x0 .glue_7t 0x08000648 0x0
.glue_7t 0x08000690 0x0 linker stubs .glue_7t 0x08000648 0x0 linker stubs
.vfp11_veneer 0x08000690 0x0 .vfp11_veneer 0x08000648 0x0
.vfp11_veneer 0x08000690 0x0 linker stubs .vfp11_veneer 0x08000648 0x0 linker stubs
.v4_bx 0x08000690 0x0 .v4_bx 0x08000648 0x0
.v4_bx 0x08000690 0x0 linker stubs .v4_bx 0x08000648 0x0 linker stubs
.iplt 0x08000690 0x0 .iplt 0x08000648 0x0
.iplt 0x08000690 0x0 build/main.o .iplt 0x08000648 0x0 build/main.o
.rel.dyn 0x08000690 0x0 .rel.dyn 0x08000648 0x0
.rel.iplt 0x08000690 0x0 build/main.o .rel.iplt 0x08000648 0x0 build/main.o
.data 0x20000000 0x0 load address 0x08000690 .data 0x20000000 0x0 load address 0x08000648
0x20000000 . = ALIGN (0x4) 0x20000000 . = ALIGN (0x4)
0x20000000 _data_start = . 0x20000000 _data_start = .
*(.data) *(.data)
@@ -299,10 +293,10 @@ LOAD build/usart.o
0x20000000 . = ALIGN (0x4) 0x20000000 . = ALIGN (0x4)
0x20000000 _data_end = . 0x20000000 _data_end = .
.igot.plt 0x20000000 0x0 load address 0x08000690 .igot.plt 0x20000000 0x0 load address 0x08000648
.igot.plt 0x20000000 0x0 build/main.o .igot.plt 0x20000000 0x0 build/main.o
.bss 0x20000000 0x0 load address 0x08000690 .bss 0x20000000 0x0 load address 0x08000648
0x20000000 . = ALIGN (0x4) 0x20000000 . = ALIGN (0x4)
0x20000000 _bss_start = . 0x20000000 _bss_start = .
*(.bss) *(.bss)
@@ -312,21 +306,21 @@ LOAD build/usart.o
OUTPUT(build/final.elf elf32-littlearm) OUTPUT(build/final.elf elf32-littlearm)
LOAD linker stubs LOAD linker stubs
.debug_info 0x00000000 0xeb1 .debug_info 0x00000000 0xe69
.debug_info 0x00000000 0x205 build/gpio.o .debug_info 0x00000000 0x205 build/gpio.o
.debug_info 0x00000205 0x47e build/main.o .debug_info 0x00000205 0x478 build/main.o
.debug_info 0x00000683 0x188 build/startup.o .debug_info 0x0000067d 0x188 build/startup.o
.debug_info 0x0000080b 0x335 build/timer.o .debug_info 0x00000805 0x335 build/timer.o
.debug_info 0x00000b40 0x371 build/usart.o .debug_info 0x00000b3a 0x32f build/usart.o
.debug_abbrev 0x00000000 0x547 .debug_abbrev 0x00000000 0x519
.debug_abbrev 0x00000000 0x119 build/gpio.o .debug_abbrev 0x00000000 0x119 build/gpio.o
.debug_abbrev 0x00000119 0x14b build/main.o .debug_abbrev 0x00000119 0x142 build/main.o
.debug_abbrev 0x00000264 0x127 build/startup.o .debug_abbrev 0x0000025b 0x127 build/startup.o
.debug_abbrev 0x0000038b 0xb5 build/timer.o .debug_abbrev 0x00000382 0xb5 build/timer.o
.debug_abbrev 0x00000440 0x107 build/usart.o .debug_abbrev 0x00000437 0xe2 build/usart.o
.debug_aranges 0x00000000 0xe0 .debug_aranges 0x00000000 0xd8
.debug_aranges .debug_aranges
0x00000000 0x28 build/gpio.o 0x00000000 0x28 build/gpio.o
.debug_aranges .debug_aranges
@@ -336,10 +330,10 @@ LOAD linker stubs
.debug_aranges .debug_aranges
0x00000080 0x28 build/timer.o 0x00000080 0x28 build/timer.o
.debug_aranges .debug_aranges
0x000000a8 0x38 build/usart.o 0x000000a8 0x30 build/usart.o
.debug_rnglists .debug_rnglists
0x00000000 0x92 0x00000000 0x8c
.debug_rnglists .debug_rnglists
0x00000000 0x19 build/gpio.o 0x00000000 0x19 build/gpio.o
.debug_rnglists .debug_rnglists
@@ -349,9 +343,9 @@ LOAD linker stubs
.debug_rnglists .debug_rnglists
0x00000053 0x19 build/timer.o 0x00000053 0x19 build/timer.o
.debug_rnglists .debug_rnglists
0x0000006c 0x26 build/usart.o 0x0000006c 0x20 build/usart.o
.debug_macro 0x00000000 0x497f .debug_macro 0x00000000 0x489d
.debug_macro 0x00000000 0xb56 build/gpio.o .debug_macro 0x00000000 0xb56 build/gpio.o
.debug_macro 0x00000b56 0x22 build/gpio.o .debug_macro 0x00000b56 0x22 build/gpio.o
.debug_macro 0x00000b78 0x75 build/gpio.o .debug_macro 0x00000b78 0x75 build/gpio.o
@@ -366,39 +360,39 @@ LOAD linker stubs
.debug_macro 0x0000108c 0x89 build/gpio.o .debug_macro 0x0000108c 0x89 build/gpio.o
.debug_macro 0x00001115 0x4cc build/gpio.o .debug_macro 0x00001115 0x4cc build/gpio.o
.debug_macro 0x000015e1 0x22 build/gpio.o .debug_macro 0x000015e1 0x22 build/gpio.o
.debug_macro 0x00001603 0xa0 build/gpio.o .debug_macro 0x00001603 0x88 build/gpio.o
.debug_macro 0x000016a3 0xb89 build/main.o .debug_macro 0x0000168b 0xb89 build/main.o
.debug_macro 0x0000222c 0x197 build/main.o .debug_macro 0x00002214 0x144 build/main.o
.debug_macro 0x000023c3 0x46 build/main.o .debug_macro 0x00002358 0x46 build/main.o
.debug_macro 0x00002409 0x2e build/main.o .debug_macro 0x0000239e 0x2e build/main.o
.debug_macro 0x00002437 0x22 build/main.o .debug_macro 0x000023cc 0x22 build/main.o
.debug_macro 0x00002459 0x82 build/main.o .debug_macro 0x000023ee 0x76 build/main.o
.debug_macro 0x000024db 0xb02 build/startup.o .debug_macro 0x00002464 0xb02 build/startup.o
.debug_macro 0x00002fdd 0x56 build/startup.o .debug_macro 0x00002f66 0x56 build/startup.o
.debug_macro 0x00003033 0x51 build/startup.o .debug_macro 0x00002fbc 0x51 build/startup.o
.debug_macro 0x00003084 0xb5c build/timer.o .debug_macro 0x0000300d 0xb5c build/timer.o
.debug_macro 0x00003be0 0x191 build/timer.o .debug_macro 0x00003b69 0x13e build/timer.o
.debug_macro 0x00003d71 0xb74 build/usart.o .debug_macro 0x00003ca7 0xb74 build/usart.o
.debug_macro 0x000048e5 0x9a build/usart.o .debug_macro 0x0000481b 0x82 build/usart.o
.debug_line 0x00000000 0x677 .debug_line 0x00000000 0x63b
.debug_line 0x00000000 0x116 build/gpio.o .debug_line 0x00000000 0x116 build/gpio.o
.debug_line 0x00000116 0x1e8 build/main.o .debug_line 0x00000116 0x1e4 build/main.o
.debug_line 0x000002fe 0xea build/startup.o .debug_line 0x000002fa 0xea build/startup.o
.debug_line 0x000003e8 0xdf build/timer.o .debug_line 0x000003e4 0xdf build/timer.o
.debug_line 0x000004c7 0x1b0 build/usart.o .debug_line 0x000004c3 0x178 build/usart.o
.debug_str 0x00000000 0x658b .debug_str 0x00000000 0x6393
.debug_str 0x00000000 0x5574 build/gpio.o .debug_str 0x00000000 0x550b build/gpio.o
0x571c (size before relaxing) 0x56b3 (size before relaxing)
.debug_str 0x00005574 0xf50 build/main.o .debug_str 0x0000550b 0xddd build/main.o
0x661c (size before relaxing) 0x6440 (size before relaxing)
.debug_str 0x000064c4 0x88 build/startup.o .debug_str 0x000062e8 0x88 build/startup.o
0x3cdc (size before relaxing) 0x3cdf (size before relaxing)
.debug_str 0x0000654c 0xc build/timer.o .debug_str 0x00006370 0xc build/timer.o
0x5cfb (size before relaxing) 0x5bc5 (size before relaxing)
.debug_str 0x00006558 0x33 build/usart.o .debug_str 0x0000637c 0x17 build/usart.o
0x6291 (size before relaxing) 0x6091 (size before relaxing)
.comment 0x00000000 0x45 .comment 0x00000000 0x45
.comment 0x00000000 0x45 build/gpio.o .comment 0x00000000 0x45 build/gpio.o
@@ -422,26 +416,26 @@ LOAD linker stubs
0x000000d0 0x34 build/usart.o 0x000000d0 0x34 build/usart.o
.debug_line_str .debug_line_str
0x00000000 0x290 0x00000000 0x293
.debug_line_str .debug_line_str
0x00000000 0x24b build/gpio.o 0x00000000 0x24e build/gpio.o
0x25d (size before relaxing) 0x260 (size before relaxing)
.debug_line_str .debug_line_str
0x0000024b 0x2b build/main.o 0x0000024e 0x2b build/main.o
0x281 (size before relaxing) 0x284 (size before relaxing)
.debug_line_str .debug_line_str
0x00000276 0xa build/startup.o 0x00000279 0xa build/startup.o
0x218 (size before relaxing) 0x21b (size before relaxing)
.debug_line_str .debug_line_str
0x00000280 0x8 build/timer.o 0x00000283 0x8 build/timer.o
0x25b (size before relaxing) 0x25e (size before relaxing)
.debug_line_str .debug_line_str
0x00000288 0x8 build/usart.o 0x0000028b 0x8 build/usart.o
0x26c (size before relaxing) 0x26f (size before relaxing)
.debug_frame 0x00000000 0x208 .debug_frame 0x00000000 0x1e4
.debug_frame 0x00000000 0x60 build/gpio.o .debug_frame 0x00000000 0x60 build/gpio.o
.debug_frame 0x00000060 0x50 build/main.o .debug_frame 0x00000060 0x50 build/main.o
.debug_frame 0x000000b0 0x6c build/startup.o .debug_frame 0x000000b0 0x6c build/startup.o
.debug_frame 0x0000011c 0x50 build/timer.o .debug_frame 0x0000011c 0x50 build/timer.o
.debug_frame 0x0000016c 0x9c build/usart.o .debug_frame 0x0000016c 0x78 build/usart.o
build/gpio.S
+116 -136
View File
@@ -188,10 +188,10 @@ gpio_write:
.byte 0x4 .byte 0x4
.4byte .Ldebug_abbrev0 .4byte .Ldebug_abbrev0
.uleb128 0x8 .uleb128 0x8
.4byte .LASF912 .4byte .LASF908
.byte 0x1d .byte 0x1d
.4byte .LASF913 .4byte .LASF909
.4byte .LASF914 .4byte .LASF910
.4byte .LLRL0 .4byte .LLRL0
.4byte 0 .4byte 0
.4byte .Ldebug_line0 .4byte .Ldebug_line0
@@ -199,17 +199,17 @@ gpio_write:
.uleb128 0x1 .uleb128 0x1
.byte 0x1 .byte 0x1
.byte 0x6 .byte 0x6
.4byte .LASF881 .4byte .LASF877
.uleb128 0x1 .uleb128 0x1
.byte 0x1 .byte 0x1
.byte 0x8 .byte 0x8
.4byte .LASF882 .4byte .LASF878
.uleb128 0x1 .uleb128 0x1
.byte 0x2 .byte 0x2
.byte 0x5 .byte 0x5
.4byte .LASF883 .4byte .LASF879
.uleb128 0x3 .uleb128 0x3
.4byte .LASF886 .4byte .LASF882
.byte 0x2 .byte 0x2
.byte 0x39 .byte 0x39
.byte 0x1c .byte 0x1c
@@ -217,13 +217,13 @@ gpio_write:
.uleb128 0x1 .uleb128 0x1
.byte 0x2 .byte 0x2
.byte 0x7 .byte 0x7
.4byte .LASF884 .4byte .LASF880
.uleb128 0x1 .uleb128 0x1
.byte 0x4 .byte 0x4
.byte 0x5 .byte 0x5
.4byte .LASF885 .4byte .LASF881
.uleb128 0x3 .uleb128 0x3
.4byte .LASF887 .4byte .LASF883
.byte 0x2 .byte 0x2
.byte 0x4f .byte 0x4f
.byte 0x1b .byte 0x1b
@@ -231,21 +231,21 @@ gpio_write:
.uleb128 0x1 .uleb128 0x1
.byte 0x4 .byte 0x4
.byte 0x7 .byte 0x7
.4byte .LASF888 .4byte .LASF884
.uleb128 0x1 .uleb128 0x1
.byte 0x8 .byte 0x8
.byte 0x5 .byte 0x5
.4byte .LASF889 .4byte .LASF885
.uleb128 0x1 .uleb128 0x1
.byte 0x8 .byte 0x8
.byte 0x7 .byte 0x7
.4byte .LASF890 .4byte .LASF886
.uleb128 0x9 .uleb128 0x9
.byte 0x4 .byte 0x4
.byte 0x5 .byte 0x5
.ascii "int\000" .ascii "int\000"
.uleb128 0x3 .uleb128 0x3
.4byte .LASF891 .4byte .LASF887
.byte 0x2 .byte 0x2
.byte 0xe8 .byte 0xe8
.byte 0x16 .byte 0x16
@@ -253,15 +253,15 @@ gpio_write:
.uleb128 0x1 .uleb128 0x1
.byte 0x4 .byte 0x4
.byte 0x7 .byte 0x7
.4byte .LASF892 .4byte .LASF888
.uleb128 0x3 .uleb128 0x3
.4byte .LASF893 .4byte .LASF889
.byte 0x3 .byte 0x3
.byte 0x24 .byte 0x24
.byte 0x14 .byte 0x14
.4byte 0x3f .4byte 0x3f
.uleb128 0x3 .uleb128 0x3
.4byte .LASF894 .4byte .LASF890
.byte 0x3 .byte 0x3
.byte 0x30 .byte 0x30
.byte 0x14 .byte 0x14
@@ -269,35 +269,35 @@ gpio_write:
.uleb128 0xa .uleb128 0xa
.4byte 0xa0 .4byte 0xa0
.uleb128 0x3 .uleb128 0x3
.4byte .LASF895 .4byte .LASF891
.byte 0x3 .byte 0x3
.byte 0x52 .byte 0x52
.byte 0x15 .byte 0x15
.4byte 0x81 .4byte 0x81
.uleb128 0xb .uleb128 0xb
.4byte .LASF911 .4byte .LASF907
.byte 0x28 .byte 0x28
.byte 0x4 .byte 0x4
.byte 0x7 .byte 0x7
.byte 0x8 .byte 0x8
.4byte 0x139 .4byte 0x139
.uleb128 0x2 .uleb128 0x2
.4byte .LASF896 .4byte .LASF892
.byte 0x8 .byte 0x8
.4byte 0xac .4byte 0xac
.byte 0 .byte 0
.uleb128 0x2 .uleb128 0x2
.4byte .LASF897 .4byte .LASF893
.byte 0x9 .byte 0x9
.4byte 0xac .4byte 0xac
.byte 0x4 .byte 0x4
.uleb128 0x2 .uleb128 0x2
.4byte .LASF898 .4byte .LASF894
.byte 0xa .byte 0xa
.4byte 0xac .4byte 0xac
.byte 0x8 .byte 0x8
.uleb128 0x2 .uleb128 0x2
.4byte .LASF899 .4byte .LASF895
.byte 0xb .byte 0xb
.4byte 0xac .4byte 0xac
.byte 0xc .byte 0xc
@@ -312,22 +312,22 @@ gpio_write:
.4byte 0xac .4byte 0xac
.byte 0x14 .byte 0x14
.uleb128 0x2 .uleb128 0x2
.4byte .LASF900 .4byte .LASF896
.byte 0xe .byte 0xe
.4byte 0xac .4byte 0xac
.byte 0x18 .byte 0x18
.uleb128 0x2 .uleb128 0x2
.4byte .LASF901 .4byte .LASF897
.byte 0xf .byte 0xf
.4byte 0xac .4byte 0xac
.byte 0x1c .byte 0x1c
.uleb128 0x2 .uleb128 0x2
.4byte .LASF902 .4byte .LASF898
.byte 0x10 .byte 0x10
.4byte 0xac .4byte 0xac
.byte 0x20 .byte 0x20
.uleb128 0x2 .uleb128 0x2
.4byte .LASF903 .4byte .LASF899
.byte 0x11 .byte 0x11
.4byte 0xac .4byte 0xac
.byte 0x24 .byte 0x24
@@ -337,30 +337,30 @@ gpio_write:
.byte 0x1 .byte 0x1
.4byte 0x31 .4byte 0x31
.byte 0x4 .byte 0x4
.byte 0x40 .byte 0x3a
.byte 0xe .byte 0xe
.4byte 0x160 .4byte 0x160
.uleb128 0x4 .uleb128 0x4
.4byte .LASF904 .4byte .LASF900
.byte 0 .byte 0
.uleb128 0x4 .uleb128 0x4
.4byte .LASF905 .4byte .LASF901
.byte 0x1 .byte 0x1
.uleb128 0x4 .uleb128 0x4
.4byte .LASF906 .4byte .LASF902
.byte 0x2 .byte 0x2
.uleb128 0x4 .uleb128 0x4
.4byte .LASF907 .4byte .LASF903
.byte 0x3 .byte 0x3
.byte 0 .byte 0
.uleb128 0x3 .uleb128 0x3
.4byte .LASF908 .4byte .LASF904
.byte 0x4 .byte 0x4
.byte 0x45 .byte 0x3f
.byte 0x3 .byte 0x3
.4byte 0x139 .4byte 0x139
.uleb128 0xd .uleb128 0xd
.4byte .LASF915 .4byte .LASF911
.byte 0x1 .byte 0x1
.byte 0xd .byte 0xd
.byte 0x6 .byte 0x6
@@ -386,7 +386,7 @@ gpio_write:
.byte 0x91 .byte 0x91
.sleb128 -19 .sleb128 -19
.uleb128 0x7 .uleb128 0x7
.4byte .LASF911 .4byte .LASF907
.byte 0xe .byte 0xe
.4byte 0x1b3 .4byte 0x1b3
.uleb128 0x2 .uleb128 0x2
@@ -396,12 +396,12 @@ gpio_write:
.uleb128 0x1 .uleb128 0x1
.byte 0x1 .byte 0x1
.byte 0x2 .byte 0x2
.4byte .LASF909 .4byte .LASF905
.uleb128 0xe .uleb128 0xe
.byte 0x4 .byte 0x4
.4byte 0xbd .4byte 0xbd
.uleb128 0xf .uleb128 0xf
.4byte .LASF916 .4byte .LASF912
.byte 0x1 .byte 0x1
.byte 0x6 .byte 0x6
.byte 0x6 .byte 0x6
@@ -418,7 +418,7 @@ gpio_write:
.byte 0x91 .byte 0x91
.sleb128 -18 .sleb128 -18
.uleb128 0x10 .uleb128 0x10
.4byte .LASF910 .4byte .LASF906
.byte 0x1 .byte 0x1
.byte 0x6 .byte 0x6
.byte 0x2c .byte 0x2c
@@ -427,7 +427,7 @@ gpio_write:
.byte 0x91 .byte 0x91
.sleb128 -19 .sleb128 -19
.uleb128 0x7 .uleb128 0x7
.4byte .LASF911 .4byte .LASF907
.byte 0x7 .byte 0x7
.4byte 0x1b3 .4byte 0x1b3
.uleb128 0x2 .uleb128 0x2
@@ -3525,7 +3525,7 @@ gpio_write:
.uleb128 0x32 .uleb128 0x32
.4byte .LASF854 .4byte .LASF854
.byte 0 .byte 0
.section .debug_macro,"G",%progbits,wm4.gpio.h.2.bc74b8bd59193b3190f972f5d232b4bf,comdat .section .debug_macro,"G",%progbits,wm4.gpio.h.2.618f9f202e3921ef232a09b28d15fb8b,comdat
.Ldebug_macro15: .Ldebug_macro15:
.2byte 0x5 .2byte 0x5
.byte 0 .byte 0
@@ -3542,71 +3542,59 @@ gpio_write:
.uleb128 0x18 .uleb128 0x18
.4byte .LASF858 .4byte .LASF858
.byte 0x5 .byte 0x5
.uleb128 0x1a .uleb128 0x19
.4byte .LASF859 .4byte .LASF859
.byte 0x5 .byte 0x5
.uleb128 0x1b .uleb128 0x1a
.4byte .LASF860 .4byte .LASF860
.byte 0x5 .byte 0x5
.uleb128 0x1d .uleb128 0x1c
.4byte .LASF861 .4byte .LASF861
.byte 0x5 .byte 0x5
.uleb128 0x1e .uleb128 0x1d
.4byte .LASF862 .4byte .LASF862
.byte 0x5 .byte 0x5
.uleb128 0x20 .uleb128 0x1e
.4byte .LASF863 .4byte .LASF863
.byte 0x5 .byte 0x5
.uleb128 0x21 .uleb128 0x21
.4byte .LASF864 .4byte .LASF864
.byte 0x5 .byte 0x5
.uleb128 0x24 .uleb128 0x22
.4byte .LASF865 .4byte .LASF865
.byte 0x5 .byte 0x5
.uleb128 0x25 .uleb128 0x23
.4byte .LASF866 .4byte .LASF866
.byte 0x5 .byte 0x5
.uleb128 0x26 .uleb128 0x25
.4byte .LASF867 .4byte .LASF867
.byte 0x5 .byte 0x5
.uleb128 0x29 .uleb128 0x26
.4byte .LASF868 .4byte .LASF868
.byte 0x5 .byte 0x5
.uleb128 0x2a .uleb128 0x27
.4byte .LASF869 .4byte .LASF869
.byte 0x5 .byte 0x5
.uleb128 0x2b .uleb128 0x2e
.4byte .LASF870 .4byte .LASF870
.byte 0x5 .byte 0x5
.uleb128 0x2d .uleb128 0x2f
.4byte .LASF871 .4byte .LASF871
.byte 0x5 .byte 0x5
.uleb128 0x2e .uleb128 0x30
.4byte .LASF872 .4byte .LASF872
.byte 0x5 .byte 0x5
.uleb128 0x2f .uleb128 0x32
.4byte .LASF873 .4byte .LASF873
.byte 0x5 .byte 0x5
.uleb128 0x34 .uleb128 0x34
.4byte .LASF874 .4byte .LASF874
.byte 0x5 .byte 0x5
.uleb128 0x35 .uleb128 0x36
.4byte .LASF875 .4byte .LASF875
.byte 0x5 .byte 0x5
.uleb128 0x36
.4byte .LASF876
.byte 0x5
.uleb128 0x38 .uleb128 0x38
.4byte .LASF877 .4byte .LASF876
.byte 0x5
.uleb128 0x3a
.4byte .LASF878
.byte 0x5
.uleb128 0x3c
.4byte .LASF879
.byte 0x5
.uleb128 0x3e
.4byte .LASF880
.byte 0 .byte 0
.section .debug_line,"",%progbits .section .debug_line,"",%progbits
.Ldebug_line0: .Ldebug_line0:
@@ -3651,7 +3639,7 @@ gpio_write:
.ascii "__PTRDIFF_MAX__ 0x7fffffff\000" .ascii "__PTRDIFF_MAX__ 0x7fffffff\000"
.LASF541: .LASF541:
.ascii "_LONG_DOUBLE long double\000" .ascii "_LONG_DOUBLE long double\000"
.LASF911: .LASF907:
.ascii "gpio\000" .ascii "gpio\000"
.LASF591: .LASF591:
.ascii "INT_LEAST8_MIN (-__INT_LEAST8_MAX__ - 1)\000" .ascii "INT_LEAST8_MIN (-__INT_LEAST8_MAX__ - 1)\000"
@@ -3659,7 +3647,7 @@ gpio_write:
.ascii "_UINT32_T_DECLARED \000" .ascii "_UINT32_T_DECLARED \000"
.LASF90: .LASF90:
.ascii "__INTMAX_MAX__ 0x7fffffffffffffffLL\000" .ascii "__INTMAX_MAX__ 0x7fffffffffffffffLL\000"
.LASF906: .LASF902:
.ascii "GPIO_MODE_AF\000" .ascii "GPIO_MODE_AF\000"
.LASF335: .LASF335:
.ascii "__TQ_IBIT__ 0\000" .ascii "__TQ_IBIT__ 0\000"
@@ -3723,6 +3711,8 @@ gpio_write:
.ascii "PRIXFAST32 __PRI32FAST(X)\000" .ascii "PRIXFAST32 __PRI32FAST(X)\000"
.LASF525: .LASF525:
.ascii "__INT8 \"hh\"\000" .ascii "__INT8 \"hh\"\000"
.LASF860:
.ascii "GPIO_MODER_MODER3_AF (0b10)\000"
.LASF47: .LASF47:
.ascii "__UINT8_TYPE__ unsigned char\000" .ascii "__UINT8_TYPE__ unsigned char\000"
.LASF368: .LASF368:
@@ -3775,14 +3765,12 @@ gpio_write:
.ascii "__need_wchar_t\000" .ascii "__need_wchar_t\000"
.LASF199: .LASF199:
.ascii "__FLT32_MIN_EXP__ (-125)\000" .ascii "__FLT32_MIN_EXP__ (-125)\000"
.LASF912: .LASF908:
.ascii "GNU C2X 12.3.1 20230626 -mcpu=cortex-m4 -mthumb -mf" .ascii "GNU C2X 12.3.1 20230626 -mcpu=cortex-m4 -mthumb -mf"
.ascii "loat-abi=hard -mfpu=fpv4-sp-d16 -march=armv7e-m+fp " .ascii "loat-abi=hard -mfpu=fpv4-sp-d16 -march=armv7e-m+fp "
.ascii "-g3 -ggdb -O0 -std=c2x -ffunction-sections -fdata-s" .ascii "-g3 -ggdb -O0 -std=c2x -ffunction-sections -fdata-s"
.ascii "ections -fno-builtin -fno-common\000" .ascii "ections -fno-builtin -fno-common\000"
.LASF865: .LASF864:
.ascii "GPIO_AFRH_AFRH8_BIT 0\000"
.LASF868:
.ascii "GPIO_AFRL_AFRL3_BIT 12\000" .ascii "GPIO_AFRL_AFRL3_BIT 12\000"
.LASF595: .LASF595:
.ascii "INT16_MAX (__INT16_MAX__)\000" .ascii "INT16_MAX (__INT16_MAX__)\000"
@@ -3864,7 +3852,7 @@ gpio_write:
.ascii "__INT64 \"ll\"\000" .ascii "__INT64 \"ll\"\000"
.LASF138: .LASF138:
.ascii "__INTPTR_MAX__ 0x7fffffff\000" .ascii "__INTPTR_MAX__ 0x7fffffff\000"
.LASF876: .LASF872:
.ascii "GPIO(port) ((struct gpio*)(uintptr_t)(GPIO_BASE_ADD" .ascii "GPIO(port) ((struct gpio*)(uintptr_t)(GPIO_BASE_ADD"
.ascii "R + (GPIO_PORT_OFFSET * port)))\000" .ascii "R + (GPIO_PORT_OFFSET * port)))\000"
.LASF499: .LASF499:
@@ -3900,7 +3888,7 @@ gpio_write:
.ascii "PRId64 __PRI64(d)\000" .ascii "PRId64 __PRI64(d)\000"
.LASF302: .LASF302:
.ascii "__UACCUM_IBIT__ 16\000" .ascii "__UACCUM_IBIT__ 16\000"
.LASF885: .LASF881:
.ascii "long int\000" .ascii "long int\000"
.LASF818: .LASF818:
.ascii "PRIXFAST64 __PRI64FAST(X)\000" .ascii "PRIXFAST64 __PRI64FAST(X)\000"
@@ -3928,8 +3916,6 @@ gpio_write:
.ascii "PRIdFAST32 __PRI32FAST(d)\000" .ascii "PRIdFAST32 __PRI32FAST(d)\000"
.LASF93: .LASF93:
.ascii "__UINTMAX_C(c) c ## ULL\000" .ascii "__UINTMAX_C(c) c ## ULL\000"
.LASF866:
.ascii "GPIO_AFRH_AFRH8_MASK (0b1111)\000"
.LASF31: .LASF31:
.ascii "__SIZEOF_POINTER__ 4\000" .ascii "__SIZEOF_POINTER__ 4\000"
.LASF621: .LASF621:
@@ -3938,6 +3924,8 @@ gpio_write:
.ascii "__GCC_ATOMIC_BOOL_LOCK_FREE 2\000" .ascii "__GCC_ATOMIC_BOOL_LOCK_FREE 2\000"
.LASF554: .LASF554:
.ascii "___int64_t_defined 1\000" .ascii "___int64_t_defined 1\000"
.LASF863:
.ascii "GPIO_MODER_MODER2_AF (0b10)\000"
.LASF432: .LASF432:
.ascii "__ARM_NEON__\000" .ascii "__ARM_NEON__\000"
.LASF587: .LASF587:
@@ -3998,7 +3986,7 @@ gpio_write:
.ascii "PRIoLEAST16 __PRI16LEAST(o)\000" .ascii "PRIoLEAST16 __PRI16LEAST(o)\000"
.LASF458: .LASF458:
.ascii "__NEWLIB__ 4\000" .ascii "__NEWLIB__ 4\000"
.LASF904: .LASF900:
.ascii "GPIO_MODE_INPUT\000" .ascii "GPIO_MODE_INPUT\000"
.LASF720: .LASF720:
.ascii "SCNi16 __SCN16(i)\000" .ascii "SCNi16 __SCN16(i)\000"
@@ -4008,7 +3996,7 @@ gpio_write:
.ascii "__FLT_DECIMAL_DIG__ 9\000" .ascii "__FLT_DECIMAL_DIG__ 9\000"
.LASF562: .LASF562:
.ascii "_UINT8_T_DECLARED \000" .ascii "_UINT8_T_DECLARED \000"
.LASF881: .LASF877:
.ascii "signed char\000" .ascii "signed char\000"
.LASF805: .LASF805:
.ascii "PRIuLEAST64 __PRI64LEAST(u)\000" .ascii "PRIuLEAST64 __PRI64LEAST(u)\000"
@@ -4020,7 +4008,7 @@ gpio_write:
.ascii "__ARM_FEATURE_FMA 1\000" .ascii "__ARM_FEATURE_FMA 1\000"
.LASF364: .LASF364:
.ascii "__GNUC_STDC_INLINE__ 1\000" .ascii "__GNUC_STDC_INLINE__ 1\000"
.LASF908: .LASF904:
.ascii "GPIO_MODE\000" .ascii "GPIO_MODE\000"
.LASF256: .LASF256:
.ascii "__FRACT_FBIT__ 15\000" .ascii "__FRACT_FBIT__ 15\000"
@@ -4042,11 +4030,11 @@ gpio_write:
.ascii "__SACCUM_MAX__ 0X7FFFP-7HK\000" .ascii "__SACCUM_MAX__ 0X7FFFP-7HK\000"
.LASF219: .LASF219:
.ascii "__FLT64_MAX_10_EXP__ 308\000" .ascii "__FLT64_MAX_10_EXP__ 308\000"
.LASF872: .LASF868:
.ascii "GPIO_AFRL_AFRL2_MASK (0b1111)\000" .ascii "GPIO_AFRL_AFRL2_MASK (0b1111)\000"
.LASF65: .LASF65:
.ascii "__UINT_FAST32_TYPE__ unsigned int\000" .ascii "__UINT_FAST32_TYPE__ unsigned int\000"
.LASF882: .LASF878:
.ascii "unsigned char\000" .ascii "unsigned char\000"
.LASF3: .LASF3:
.ascii "__STDC_UTF_32__ 1\000" .ascii "__STDC_UTF_32__ 1\000"
@@ -4094,13 +4082,13 @@ gpio_write:
.ascii "__int_fast64_t_defined 1\000" .ascii "__int_fast64_t_defined 1\000"
.LASF837: .LASF837:
.ascii "__PRIPTR(x) __STRINGIFY(x)\000" .ascii "__PRIPTR(x) __STRINGIFY(x)\000"
.LASF893: .LASF889:
.ascii "uint16_t\000" .ascii "uint16_t\000"
.LASF417: .LASF417:
.ascii "__thumb2__ 1\000" .ascii "__thumb2__ 1\000"
.LASF321: .LASF321:
.ascii "__ULLACCUM_FBIT__ 32\000" .ascii "__ULLACCUM_FBIT__ 32\000"
.LASF909: .LASF905:
.ascii "_Bool\000" .ascii "_Bool\000"
.LASF366: .LASF366:
.ascii "__STRICT_ANSI__ 1\000" .ascii "__STRICT_ANSI__ 1\000"
@@ -4118,7 +4106,7 @@ gpio_write:
.ascii "__PRAGMA_REDEFINE_EXTNAME 1\000" .ascii "__PRAGMA_REDEFINE_EXTNAME 1\000"
.LASF36: .LASF36:
.ascii "__WCHAR_TYPE__ unsigned int\000" .ascii "__WCHAR_TYPE__ unsigned int\000"
.LASF905: .LASF901:
.ascii "GPIO_MODE_OUTPUT\000" .ascii "GPIO_MODE_OUTPUT\000"
.LASF357: .LASF357:
.ascii "__USA_IBIT__ 16\000" .ascii "__USA_IBIT__ 16\000"
@@ -4156,7 +4144,7 @@ gpio_write:
.ascii "__SCN64(x) __INT64 __STRINGIFY(x)\000" .ascii "__SCN64(x) __INT64 __STRINGIFY(x)\000"
.LASF646: .LASF646:
.ascii "_GCC_WRAP_STDINT_H \000" .ascii "_GCC_WRAP_STDINT_H \000"
.LASF886: .LASF882:
.ascii "__uint16_t\000" .ascii "__uint16_t\000"
.LASF224: .LASF224:
.ascii "__FLT64_EPSILON__ 2.2204460492503131e-16F64\000" .ascii "__FLT64_EPSILON__ 2.2204460492503131e-16F64\000"
@@ -4184,7 +4172,7 @@ gpio_write:
.ascii "INTMAX_MAX (__INTMAX_MAX__)\000" .ascii "INTMAX_MAX (__INTMAX_MAX__)\000"
.LASF601: .LASF601:
.ascii "INT32_MAX (__INT32_MAX__)\000" .ascii "INT32_MAX (__INT32_MAX__)\000"
.LASF877: .LASF873:
.ascii "BIT(x) (1 << x)\000" .ascii "BIT(x) (1 << x)\000"
.LASF469: .LASF469:
.ascii "_MB_LEN_MAX 8\000" .ascii "_MB_LEN_MAX 8\000"
@@ -4202,7 +4190,7 @@ gpio_write:
.ascii "_END_STD_C \000" .ascii "_END_STD_C \000"
.LASF852: .LASF852:
.ascii "true ((_Bool)+1u)\000" .ascii "true ((_Bool)+1u)\000"
.LASF869: .LASF865:
.ascii "GPIO_AFRL_AFRL3_MASK (0b1111)\000" .ascii "GPIO_AFRL_AFRL3_MASK (0b1111)\000"
.LASF599: .LASF599:
.ascii "UINT_LEAST16_MAX (__UINT_LEAST16_MAX__)\000" .ascii "UINT_LEAST16_MAX (__UINT_LEAST16_MAX__)\000"
@@ -4216,7 +4204,7 @@ gpio_write:
.ascii "__FLT_EPSILON__ 1.1920928955078125e-7F\000" .ascii "__FLT_EPSILON__ 1.1920928955078125e-7F\000"
.LASF376: .LASF376:
.ascii "__GCC_ATOMIC_SHORT_LOCK_FREE 2\000" .ascii "__GCC_ATOMIC_SHORT_LOCK_FREE 2\000"
.LASF878: .LASF874:
.ascii "PIN(port,num) ((((port) - 'A') << 8) | num)\000" .ascii "PIN(port,num) ((((port) - 'A') << 8) | num)\000"
.LASF806: .LASF806:
.ascii "PRIxLEAST64 __PRI64LEAST(x)\000" .ascii "PRIxLEAST64 __PRI64LEAST(x)\000"
@@ -4282,7 +4270,7 @@ gpio_write:
.ascii "__FP_FAST_FMAF 1\000" .ascii "__FP_FAST_FMAF 1\000"
.LASF628: .LASF628:
.ascii "SIG_ATOMIC_MIN (-__STDINT_EXP(INT_MAX) - 1)\000" .ascii "SIG_ATOMIC_MIN (-__STDINT_EXP(INT_MAX) - 1)\000"
.LASF873: .LASF869:
.ascii "GPIO_AFRL_AFRL2_USART2_TX (0b0111)\000" .ascii "GPIO_AFRL_AFRL2_USART2_TX (0b0111)\000"
.LASF564: .LASF564:
.ascii "_INT16_T_DECLARED \000" .ascii "_INT16_T_DECLARED \000"
@@ -4306,8 +4294,6 @@ gpio_write:
.ascii "__ARM_FEATURE_FP16_FML\000" .ascii "__ARM_FEATURE_FP16_FML\000"
.LASF802: .LASF802:
.ascii "PRIdLEAST64 __PRI64LEAST(d)\000" .ascii "PRIdLEAST64 __PRI64LEAST(d)\000"
.LASF858:
.ascii "GPIO_MODER_AF_MODE (0b10)\000"
.LASF255: .LASF255:
.ascii "__USFRACT_EPSILON__ 0x1P-8UHR\000" .ascii "__USFRACT_EPSILON__ 0x1P-8UHR\000"
.LASF762: .LASF762:
@@ -4328,7 +4314,7 @@ gpio_write:
.ascii "INT64_C(x) __INT64_C(x)\000" .ascii "INT64_C(x) __INT64_C(x)\000"
.LASF615: .LASF615:
.ascii "INT_FAST16_MIN (-__INT_FAST16_MAX__ - 1)\000" .ascii "INT_FAST16_MIN (-__INT_FAST16_MAX__ - 1)\000"
.LASF864: .LASF862:
.ascii "GPIO_MODER_MODER2_MASK (0b11)\000" .ascii "GPIO_MODER_MODER2_MASK (0b11)\000"
.LASF106: .LASF106:
.ascii "__INT_LEAST8_MAX__ 0x7f\000" .ascii "__INT_LEAST8_MAX__ 0x7f\000"
@@ -4356,8 +4342,6 @@ gpio_write:
.ascii "__PRI8LEAST(x) __LEAST8 __STRINGIFY(x)\000" .ascii "__PRI8LEAST(x) __LEAST8 __STRINGIFY(x)\000"
.LASF174: .LASF174:
.ascii "__DBL_EPSILON__ ((double)2.2204460492503131e-16L)\000" .ascii "__DBL_EPSILON__ ((double)2.2204460492503131e-16L)\000"
.LASF860:
.ascii "GPIO_MODER_MODER8_MASK (0b11)\000"
.LASF268: .LASF268:
.ascii "__LFRACT_MIN__ (-0.5LR-0.5LR)\000" .ascii "__LFRACT_MIN__ (-0.5LR-0.5LR)\000"
.LASF117: .LASF117:
@@ -4380,7 +4364,7 @@ gpio_write:
.ascii "___int8_t_defined 1\000" .ascii "___int8_t_defined 1\000"
.LASF248: .LASF248:
.ascii "__SFRACT_MIN__ (-0.5HR-0.5HR)\000" .ascii "__SFRACT_MIN__ (-0.5HR-0.5HR)\000"
.LASF888: .LASF884:
.ascii "long unsigned int\000" .ascii "long unsigned int\000"
.LASF349: .LASF349:
.ascii "__SA_IBIT__ 16\000" .ascii "__SA_IBIT__ 16\000"
@@ -4396,7 +4380,7 @@ gpio_write:
.ascii "__ARM_FP16_FORMAT_IEEE\000" .ascii "__ARM_FP16_FORMAT_IEEE\000"
.LASF48: .LASF48:
.ascii "__UINT16_TYPE__ short unsigned int\000" .ascii "__UINT16_TYPE__ short unsigned int\000"
.LASF915: .LASF911:
.ascii "gpio_write\000" .ascii "gpio_write\000"
.LASF569: .LASF569:
.ascii "__int32_t_defined 1\000" .ascii "__int32_t_defined 1\000"
@@ -4408,6 +4392,8 @@ gpio_write:
.ascii "__FLT_EVAL_METHOD_TS_18661_3__ 0\000" .ascii "__FLT_EVAL_METHOD_TS_18661_3__ 0\000"
.LASF521: .LASF521:
.ascii "int +2\000" .ascii "int +2\000"
.LASF910:
.ascii "/home/alex/code/own/c-compile-experiments\000"
.LASF636: .LASF636:
.ascii "INT8_C(x) __INT8_C(x)\000" .ascii "INT8_C(x) __INT8_C(x)\000"
.LASF63: .LASF63:
@@ -4440,7 +4426,7 @@ gpio_write:
.ascii "SCNx8 __SCN8(x)\000" .ascii "SCNx8 __SCN8(x)\000"
.LASF208: .LASF208:
.ascii "__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32\000" .ascii "__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32\000"
.LASF916: .LASF912:
.ascii "gpio_set_mode\000" .ascii "gpio_set_mode\000"
.LASF125: .LASF125:
.ascii "__UINT64_C(c) c ## ULL\000" .ascii "__UINT64_C(c) c ## ULL\000"
@@ -4462,7 +4448,7 @@ gpio_write:
.ascii "__GCC_ATOMIC_CHAR16_T_LOCK_FREE 2\000" .ascii "__GCC_ATOMIC_CHAR16_T_LOCK_FREE 2\000"
.LASF789: .LASF789:
.ascii "__PRI64FAST(x) __FAST64 __STRINGIFY(x)\000" .ascii "__PRI64FAST(x) __FAST64 __STRINGIFY(x)\000"
.LASF895: .LASF891:
.ascii "uintptr_t\000" .ascii "uintptr_t\000"
.LASF168: .LASF168:
.ascii "__DBL_MAX_EXP__ 1024\000" .ascii "__DBL_MAX_EXP__ 1024\000"
@@ -4510,7 +4496,7 @@ gpio_write:
.ascii "PRIX32 __PRI32(X)\000" .ascii "PRIX32 __PRI32(X)\000"
.LASF773: .LASF773:
.ascii "SCNxLEAST32 __SCN32LEAST(x)\000" .ascii "SCNxLEAST32 __SCN32LEAST(x)\000"
.LASF898: .LASF894:
.ascii "OSPEEDR\000" .ascii "OSPEEDR\000"
.LASF711: .LASF711:
.ascii "__SCN16LEAST(x) __LEAST16 __STRINGIFY(x)\000" .ascii "__SCN16LEAST(x) __LEAST16 __STRINGIFY(x)\000"
@@ -4540,7 +4526,7 @@ gpio_write:
.ascii "__ULACCUM_MIN__ 0.0ULK\000" .ascii "__ULACCUM_MIN__ 0.0ULK\000"
.LASF461: .LASF461:
.ascii "_ATEXIT_DYNAMIC_ALLOC 1\000" .ascii "_ATEXIT_DYNAMIC_ALLOC 1\000"
.LASF887: .LASF883:
.ascii "__uint32_t\000" .ascii "__uint32_t\000"
.LASF188: .LASF188:
.ascii "__LDBL_MAX__ 1.7976931348623157e+308L\000" .ascii "__LDBL_MAX__ 1.7976931348623157e+308L\000"
@@ -4550,7 +4536,7 @@ gpio_write:
.ascii "__FLT_RADIX__ 2\000" .ascii "__FLT_RADIX__ 2\000"
.LASF454: .LASF454:
.ascii "_INTTYPES_H \000" .ascii "_INTTYPES_H \000"
.LASF889: .LASF885:
.ascii "long long int\000" .ascii "long long int\000"
.LASF401: .LASF401:
.ascii "__ARM_FEATURE_CMSE\000" .ascii "__ARM_FEATURE_CMSE\000"
@@ -4586,7 +4572,7 @@ gpio_write:
.ascii "__WCHAR_T \000" .ascii "__WCHAR_T \000"
.LASF223: .LASF223:
.ascii "__FLT64_MIN__ 2.2250738585072014e-308F64\000" .ascii "__FLT64_MIN__ 2.2250738585072014e-308F64\000"
.LASF870: .LASF866:
.ascii "GPIO_AFRL_AFRL3_USART2_RX (0b0111)\000" .ascii "GPIO_AFRL_AFRL3_USART2_RX (0b0111)\000"
.LASF553: .LASF553:
.ascii "___int32_t_defined 1\000" .ascii "___int32_t_defined 1\000"
@@ -4657,22 +4643,20 @@ gpio_write:
.ascii "\000" .ascii "\000"
.LASF582: .LASF582:
.ascii "__int_fast16_t_defined 1\000" .ascii "__int_fast16_t_defined 1\000"
.LASF896: .LASF892:
.ascii "MODER\000" .ascii "MODER\000"
.LASF482: .LASF482:
.ascii "__FLOAT_TYPE float\000" .ascii "__FLOAT_TYPE float\000"
.LASF185: .LASF185:
.ascii "__LDBL_MAX_10_EXP__ 308\000" .ascii "__LDBL_MAX_10_EXP__ 308\000"
.LASF867:
.ascii "GPIO_AFRH_AFRH8_MCO_1 (0b0000)\000"
.LASF175: .LASF175:
.ascii "__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324" .ascii "__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324"
.ascii "L)\000" .ascii "L)\000"
.LASF607: .LASF607:
.ascii "INT64_MAX (__INT64_MAX__)\000" .ascii "INT64_MAX (__INT64_MAX__)\000"
.LASF892: .LASF888:
.ascii "unsigned int\000" .ascii "unsigned int\000"
.LASF891: .LASF887:
.ascii "__uintptr_t\000" .ascii "__uintptr_t\000"
.LASF459: .LASF459:
.ascii "__NEWLIB_MINOR__ 3\000" .ascii "__NEWLIB_MINOR__ 3\000"
@@ -4704,7 +4688,7 @@ gpio_write:
.ascii "__CHAR_BIT__ 8\000" .ascii "__CHAR_BIT__ 8\000"
.LASF143: .LASF143:
.ascii "__FLT_EVAL_METHOD__ 0\000" .ascii "__FLT_EVAL_METHOD__ 0\000"
.LASF883: .LASF879:
.ascii "short int\000" .ascii "short int\000"
.LASF685: .LASF685:
.ascii "PRIdLEAST8 __PRI8LEAST(d)\000" .ascii "PRIdLEAST8 __PRI8LEAST(d)\000"
@@ -4764,8 +4748,6 @@ gpio_write:
.ascii "__ATFILE_VISIBLE 0\000" .ascii "__ATFILE_VISIBLE 0\000"
.LASF372: .LASF372:
.ascii "__GCC_ATOMIC_CHAR_LOCK_FREE 2\000" .ascii "__GCC_ATOMIC_CHAR_LOCK_FREE 2\000"
.LASF859:
.ascii "GPIO_MODER_MODER8_BIT 16\000"
.LASF270: .LASF270:
.ascii "__LFRACT_EPSILON__ 0x1P-31LR\000" .ascii "__LFRACT_EPSILON__ 0x1P-31LR\000"
.LASF808: .LASF808:
@@ -4832,7 +4814,7 @@ gpio_write:
.ascii "__UFRACT_IBIT__ 0\000" .ascii "__UFRACT_IBIT__ 0\000"
.LASF399: .LASF399:
.ascii "__ARM_32BIT_STATE 1\000" .ascii "__ARM_32BIT_STATE 1\000"
.LASF863: .LASF861:
.ascii "GPIO_MODER_MODER2_BIT 4\000" .ascii "GPIO_MODER_MODER2_BIT 4\000"
.LASF107: .LASF107:
.ascii "__INT8_C(c) c\000" .ascii "__INT8_C(c) c\000"
@@ -4846,13 +4828,13 @@ gpio_write:
.ascii "SCNuFAST16 __SCN16FAST(u)\000" .ascii "SCNuFAST16 __SCN16FAST(u)\000"
.LASF801: .LASF801:
.ascii "SCNx64 __SCN64(x)\000" .ascii "SCNx64 __SCN64(x)\000"
.LASF880: .LASF876:
.ascii "PINPORT(pin) (pin >> 8)\000" .ascii "PINPORT(pin) (pin >> 8)\000"
.LASF198: .LASF198:
.ascii "__FLT32_DIG__ 6\000" .ascii "__FLT32_DIG__ 6\000"
.LASF645: .LASF645:
.ascii "UINTMAX_C(x) __UINTMAX_C(x)\000" .ascii "UINTMAX_C(x) __UINTMAX_C(x)\000"
.LASF862: .LASF859:
.ascii "GPIO_MODER_MODER3_MASK (0b11)\000" .ascii "GPIO_MODER_MODER3_MASK (0b11)\000"
.LASF623: .LASF623:
.ascii "UINT_FAST64_MAX (__UINT_FAST64_MAX__)\000" .ascii "UINT_FAST64_MAX (__UINT_FAST64_MAX__)\000"
@@ -4896,7 +4878,7 @@ gpio_write:
.ascii "__ORDER_LITTLE_ENDIAN__ 1234\000" .ascii "__ORDER_LITTLE_ENDIAN__ 1234\000"
.LASF155: .LASF155:
.ascii "__FLT_NORM_MAX__ 3.4028234663852886e+38F\000" .ascii "__FLT_NORM_MAX__ 3.4028234663852886e+38F\000"
.LASF890: .LASF886:
.ascii "long long unsigned int\000" .ascii "long long unsigned int\000"
.LASF611: .LASF611:
.ascii "UINT_LEAST64_MAX (__UINT_LEAST64_MAX__)\000" .ascii "UINT_LEAST64_MAX (__UINT_LEAST64_MAX__)\000"
@@ -4926,8 +4908,8 @@ gpio_write:
.ascii "SCNdFAST32 __SCN32FAST(d)\000" .ascii "SCNdFAST32 __SCN32FAST(d)\000"
.LASF339: .LASF339:
.ascii "__UHQ_IBIT__ 0\000" .ascii "__UHQ_IBIT__ 0\000"
.LASF861: .LASF858:
.ascii "GPIO_MODER_MODER3_BIT 6\000" .ascii "GPIO_MODER_MODER3_BIT 7\000"
.LASF60: .LASF60:
.ascii "__INT_FAST16_TYPE__ int\000" .ascii "__INT_FAST16_TYPE__ int\000"
.LASF631: .LASF631:
@@ -4976,11 +4958,11 @@ gpio_write:
.ascii "SCNdFAST8 __SCN8FAST(d)\000" .ascii "SCNdFAST8 __SCN8FAST(d)\000"
.LASF576: .LASF576:
.ascii "_UINTPTR_T_DECLARED \000" .ascii "_UINTPTR_T_DECLARED \000"
.LASF903: .LASF899:
.ascii "AFRH\000" .ascii "AFRH\000"
.LASF314: .LASF314:
.ascii "__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULK\000" .ascii "__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULK\000"
.LASF902: .LASF898:
.ascii "AFRL\000" .ascii "AFRL\000"
.LASF273: .LASF273:
.ascii "__ULFRACT_MIN__ 0.0ULR\000" .ascii "__ULFRACT_MIN__ 0.0ULR\000"
@@ -4994,7 +4976,7 @@ gpio_write:
.ascii "__INT32_TYPE__ long int\000" .ascii "__INT32_TYPE__ long int\000"
.LASF118: .LASF118:
.ascii "__UINT_LEAST8_MAX__ 0xff\000" .ascii "__UINT_LEAST8_MAX__ 0xff\000"
.LASF901: .LASF897:
.ascii "LCKR\000" .ascii "LCKR\000"
.LASF520: .LASF520:
.ascii "__int20__ +2\000" .ascii "__int20__ +2\000"
@@ -5040,7 +5022,7 @@ gpio_write:
.ascii "__QQ_IBIT__ 0\000" .ascii "__QQ_IBIT__ 0\000"
.LASF763: .LASF763:
.ascii "PRIdLEAST32 __PRI32LEAST(d)\000" .ascii "PRIdLEAST32 __PRI32LEAST(d)\000"
.LASF897: .LASF893:
.ascii "OTYPER\000" .ascii "OTYPER\000"
.LASF811: .LASF811:
.ascii "SCNuLEAST64 __SCN64LEAST(u)\000" .ascii "SCNuLEAST64 __SCN64LEAST(u)\000"
@@ -5060,11 +5042,11 @@ gpio_write:
.ascii "__GNUC_MINOR__ 3\000" .ascii "__GNUC_MINOR__ 3\000"
.LASF57: .LASF57:
.ascii "__UINT_LEAST32_TYPE__ long unsigned int\000" .ascii "__UINT_LEAST32_TYPE__ long unsigned int\000"
.LASF913: .LASF909:
.ascii "src/gpio.c\000" .ascii "src/gpio.c\000"
.LASF405: .LASF405:
.ascii "__ARM_FEATURE_NUMERIC_MAXMIN\000" .ascii "__ARM_FEATURE_NUMERIC_MAXMIN\000"
.LASF874: .LASF870:
.ascii "GPIO_BASE_ADDR (0x40020000U)\000" .ascii "GPIO_BASE_ADDR (0x40020000U)\000"
.LASF38: .LASF38:
.ascii "__INTMAX_TYPE__ long long int\000" .ascii "__INTMAX_TYPE__ long long int\000"
@@ -5116,7 +5098,7 @@ gpio_write:
.ascii "__SCN8(x) __INT8 __STRINGIFY(x)\000" .ascii "__SCN8(x) __INT8 __STRINGIFY(x)\000"
.LASF23: .LASF23:
.ascii "__SIZEOF_SIZE_T__ 4\000" .ascii "__SIZEOF_SIZE_T__ 4\000"
.LASF875: .LASF871:
.ascii "GPIO_PORT_OFFSET (0x400U)\000" .ascii "GPIO_PORT_OFFSET (0x400U)\000"
.LASF50: .LASF50:
.ascii "__UINT64_TYPE__ long long unsigned int\000" .ascii "__UINT64_TYPE__ long long unsigned int\000"
@@ -5126,7 +5108,7 @@ gpio_write:
.ascii "__INT64_C(c) c ## LL\000" .ascii "__INT64_C(c) c ## LL\000"
.LASF699: .LASF699:
.ascii "PRIuFAST8 __PRI8FAST(u)\000" .ascii "PRIuFAST8 __PRI8FAST(u)\000"
.LASF871: .LASF867:
.ascii "GPIO_AFRL_AFRL2_BIT 8\000" .ascii "GPIO_AFRL_AFRL2_BIT 8\000"
.LASF190: .LASF190:
.ascii "__LDBL_MIN__ 2.2250738585072014e-308L\000" .ascii "__LDBL_MIN__ 2.2250738585072014e-308L\000"
@@ -5136,7 +5118,7 @@ gpio_write:
.ascii "__ACCUM_IBIT__ 16\000" .ascii "__ACCUM_IBIT__ 16\000"
.LASF509: .LASF509:
.ascii "unsigned\000" .ascii "unsigned\000"
.LASF899: .LASF895:
.ascii "PUPDR\000" .ascii "PUPDR\000"
.LASF835: .LASF835:
.ascii "SCNuMAX __SCNMAX(u)\000" .ascii "SCNuMAX __SCNMAX(u)\000"
@@ -5146,7 +5128,7 @@ gpio_write:
.ascii "_ATTRIBUTE(attrs) __attribute__ (attrs)\000" .ascii "_ATTRIBUTE(attrs) __attribute__ (attrs)\000"
.LASF359: .LASF359:
.ascii "__UDA_IBIT__ 32\000" .ascii "__UDA_IBIT__ 32\000"
.LASF910: .LASF906:
.ascii "mode\000" .ascii "mode\000"
.LASF586: .LASF586:
.ascii "INTPTR_MAX (__INTPTR_MAX__)\000" .ascii "INTPTR_MAX (__INTPTR_MAX__)\000"
@@ -5160,7 +5142,7 @@ gpio_write:
.ascii "__UHQ_FBIT__ 16\000" .ascii "__UHQ_FBIT__ 16\000"
.LASF443: .LASF443:
.ascii "__ARM_FEATURE_COPROC\000" .ascii "__ARM_FEATURE_COPROC\000"
.LASF907: .LASF903:
.ascii "GPIO_MODE_ANALOG\000" .ascii "GPIO_MODE_ANALOG\000"
.LASF177: .LASF177:
.ascii "__DBL_HAS_INFINITY__ 1\000" .ascii "__DBL_HAS_INFINITY__ 1\000"
@@ -5198,7 +5180,7 @@ gpio_write:
.ascii "__FAST8 \000" .ascii "__FAST8 \000"
.LASF496: .LASF496:
.ascii "__XSI_VISIBLE 0\000" .ascii "__XSI_VISIBLE 0\000"
.LASF900: .LASF896:
.ascii "BSRR\000" .ascii "BSRR\000"
.LASF794: .LASF794:
.ascii "PRIu64 __PRI64(u)\000" .ascii "PRIu64 __PRI64(u)\000"
@@ -5286,7 +5268,7 @@ gpio_write:
.ascii "PRIx32 __PRI32(x)\000" .ascii "PRIx32 __PRI32(x)\000"
.LASF278: .LASF278:
.ascii "__LLFRACT_MIN__ (-0.5LLR-0.5LLR)\000" .ascii "__LLFRACT_MIN__ (-0.5LLR-0.5LLR)\000"
.LASF894: .LASF890:
.ascii "uint32_t\000" .ascii "uint32_t\000"
.LASF689: .LASF689:
.ascii "PRIxLEAST8 __PRI8LEAST(x)\000" .ascii "PRIxLEAST8 __PRI8LEAST(x)\000"
@@ -5334,13 +5316,13 @@ gpio_write:
.ascii "__INT_LEAST16_TYPE__ short int\000" .ascii "__INT_LEAST16_TYPE__ short int\000"
.LASF326: .LASF326:
.ascii "__QQ_FBIT__ 7\000" .ascii "__QQ_FBIT__ 7\000"
.LASF879: .LASF875:
.ascii "PINNUM(pin) (pin & 0b1111)\000" .ascii "PINNUM(pin) (pin & 0b1111)\000"
.LASF768: .LASF768:
.ascii "PRIXLEAST32 __PRI32LEAST(X)\000" .ascii "PRIXLEAST32 __PRI32LEAST(X)\000"
.LASF171: .LASF171:
.ascii "__DBL_MAX__ ((double)1.7976931348623157e+308L)\000" .ascii "__DBL_MAX__ ((double)1.7976931348623157e+308L)\000"
.LASF884: .LASF880:
.ascii "short unsigned int\000" .ascii "short unsigned int\000"
.LASF276: .LASF276:
.ascii "__LLFRACT_FBIT__ 63\000" .ascii "__LLFRACT_FBIT__ 63\000"
@@ -5388,8 +5370,6 @@ gpio_write:
.ascii "__SCN64LEAST(x) __LEAST64 __STRINGIFY(x)\000" .ascii "__SCN64LEAST(x) __LEAST64 __STRINGIFY(x)\000"
.LASF280: .LASF280:
.ascii "__LLFRACT_EPSILON__ 0x1P-63LLR\000" .ascii "__LLFRACT_EPSILON__ 0x1P-63LLR\000"
.LASF914:
.ascii "/home/alex/code/own/stm32-falling-sand\000"
.LASF249: .LASF249:
.ascii "__SFRACT_MAX__ 0X7FP-7HR\000" .ascii "__SFRACT_MAX__ 0X7FP-7HR\000"
.LASF230: .LASF230:
build/gpio.i
+8 -14
View File
@@ -1,5 +1,5 @@
# 0 "src/gpio.c" # 0 "src/gpio.c"
# 1 "/home/alex/code/own/stm32-falling-sand//" # 1 "/home/alex/code/own/c-compile-experiments//"
# 0 "<built-in>" # 0 "<built-in>"
#define __STDC__ 1 #define __STDC__ 1
# 0 "<built-in>" # 0 "<built-in>"
@@ -2003,21 +2003,13 @@ struct gpio {
#define GPIOA ((struct gpio *) GPIOA_BASE_ADDR) #define GPIOA ((struct gpio *) GPIOA_BASE_ADDR)
#define GPIO_MODER_AF_MODE (0b10) #define GPIO_MODER_MODER3_BIT 7
#define GPIO_MODER_MODER8_BIT 16
#define GPIO_MODER_MODER8_MASK (0b11)
#define GPIO_MODER_MODER3_BIT 6
#define GPIO_MODER_MODER3_MASK (0b11) #define GPIO_MODER_MODER3_MASK (0b11)
#define GPIO_MODER_MODER3_AF (0b10)
#define GPIO_MODER_MODER2_BIT 4 #define GPIO_MODER_MODER2_BIT 4
#define GPIO_MODER_MODER2_MASK (0b11) #define GPIO_MODER_MODER2_MASK (0b11)
#define GPIO_MODER_MODER2_AF (0b10)
#define GPIO_AFRH_AFRH8_BIT 0
#define GPIO_AFRH_AFRH8_MASK (0b1111)
#define GPIO_AFRH_AFRH8_MCO_1 (0b0000)
#define GPIO_AFRL_AFRL3_BIT 12 #define GPIO_AFRL_AFRL3_BIT 12
@@ -2031,6 +2023,8 @@ struct gpio {
#define GPIO_BASE_ADDR (0x40020000U) #define GPIO_BASE_ADDR (0x40020000U)
#define GPIO_PORT_OFFSET (0x400U) #define GPIO_PORT_OFFSET (0x400U)
#define GPIO(port) ((struct gpio*)(uintptr_t)(GPIO_BASE_ADDR + (GPIO_PORT_OFFSET * port))) #define GPIO(port) ((struct gpio*)(uintptr_t)(GPIO_BASE_ADDR + (GPIO_PORT_OFFSET * port)))
@@ -2052,9 +2046,9 @@ typedef enum {
void gpio_set_mode(uint16_t pin, GPIO_MODE mode); void gpio_set_mode(uint16_t pin, GPIO_MODE mode);
void gpio_write(uint16_t pin, void gpio_write(uint16_t pin,
# 72 "src/gpio.h" 3 4 # 66 "src/gpio.h" 3 4
_Bool _Bool
# 72 "src/gpio.h" # 66 "src/gpio.h"
val); val);
# 5 "src/gpio.c" 2 # 5 "src/gpio.c" 2
build/gpio.o
BIN
View File
Binary file not shown.
build/main.S
+540 -644
View File
File diff suppressed because it is too large Load Diff
build/main.i
+25 -67
View File
@@ -1,5 +1,5 @@
# 0 "src/main.c" # 0 "src/main.c"
# 1 "/home/alex/code/own/stm32-falling-sand//" # 1 "/home/alex/code/own/c-compile-experiments//"
# 0 "<built-in>" # 0 "<built-in>"
#define __STDC__ 1 #define __STDC__ 1
# 0 "<built-in>" # 0 "<built-in>"
@@ -2029,11 +2029,6 @@ struct rcc {
#define RCC_CR_PLLON_ON (1 << RCC_CR_PLLON_BIT) #define RCC_CR_PLLON_ON (1 << RCC_CR_PLLON_BIT)
#define RCC_CR_CSS_BIT 19
#define RCC_CR_CSS_ON (1 << RCC_CR_CSS_BIT)
#define RCC_CR_HSERDY_BIT 17 #define RCC_CR_HSERDY_BIT 17
#define RCC_CR_HSERDY_READY (1 << RCC_CR_HSERDY_BIT) #define RCC_CR_HSERDY_READY (1 << RCC_CR_HSERDY_BIT)
@@ -2056,7 +2051,6 @@ struct rcc {
#define RCC_PLLCFGR_PLLSRC_BIT 22 #define RCC_PLLCFGR_PLLSRC_BIT 22
#define RCC_PLLCFGR_PLLSRC_HSE (1 << RCC_PLLCFGR_PLLSRC_BIT) #define RCC_PLLCFGR_PLLSRC_HSE (1 << RCC_PLLCFGR_PLLSRC_BIT)
#define RCC_PLLCFGR_PLLSRC_HSI (0 << RCC_PLLCFGR_PLLSRC_BIT)
#define RCC_PLLCFGR_PLLP_BIT 16 #define RCC_PLLCFGR_PLLP_BIT 16
#define RCC_PLLCFGR_PLLP_MASK (0b11) #define RCC_PLLCFGR_PLLP_MASK (0b11)
@@ -2076,19 +2070,6 @@ struct rcc {
#define RCC_CFGR_PPRE_DIV_2 (0b100) #define RCC_CFGR_PPRE_DIV_2 (0b100)
#define RCC_CFGR_MCO1_HSI (0b00)
#define RCC_CFGR_MCO1_HSE (0b10)
#define RCC_CFGR_MCO1_PLL (0b11)
#define RCC_CFGR_MCO1_BIT 21
#define RCC_CFGR_MCO1_MASK (0b11)
#define RCC_CFGR_MCO1PRE_DIV4 (0b110)
#define RCC_CFGR_MCO1PRE_BIT 24
#define RCC_CFGR_MCO1PRE_MASK (0b111)
#define RCC_CFGR_PPRE2_BIT 13 #define RCC_CFGR_PPRE2_BIT 13
#define RCC_CFGR_PPRE2_MASK (0b111) #define RCC_CFGR_PPRE2_MASK (0b111)
@@ -2109,7 +2090,6 @@ struct rcc {
#define RCC_CFGR_SWS_MASK (0b11) #define RCC_CFGR_SWS_MASK (0b11)
#define RCC_CFGR_SW_PLL (0b10)
#define RCC_CFGR_SW_PLL (0b10) #define RCC_CFGR_SW_PLL (0b10)
#define RCC_CFGR_SW_BIT 0 #define RCC_CFGR_SW_BIT 0
@@ -2155,21 +2135,13 @@ struct gpio {
#define GPIOA ((struct gpio *) GPIOA_BASE_ADDR) #define GPIOA ((struct gpio *) GPIOA_BASE_ADDR)
#define GPIO_MODER_AF_MODE (0b10) #define GPIO_MODER_MODER3_BIT 7
#define GPIO_MODER_MODER8_BIT 16
#define GPIO_MODER_MODER8_MASK (0b11)
#define GPIO_MODER_MODER3_BIT 6
#define GPIO_MODER_MODER3_MASK (0b11) #define GPIO_MODER_MODER3_MASK (0b11)
#define GPIO_MODER_MODER3_AF (0b10)
#define GPIO_MODER_MODER2_BIT 4 #define GPIO_MODER_MODER2_BIT 4
#define GPIO_MODER_MODER2_MASK (0b11) #define GPIO_MODER_MODER2_MASK (0b11)
#define GPIO_MODER_MODER2_AF (0b10)
#define GPIO_AFRH_AFRH8_BIT 0
#define GPIO_AFRH_AFRH8_MASK (0b1111)
#define GPIO_AFRH_AFRH8_MCO_1 (0b0000)
#define GPIO_AFRL_AFRL3_BIT 12 #define GPIO_AFRL_AFRL3_BIT 12
@@ -2183,6 +2155,8 @@ struct gpio {
#define GPIO_BASE_ADDR (0x40020000U) #define GPIO_BASE_ADDR (0x40020000U)
#define GPIO_PORT_OFFSET (0x400U) #define GPIO_PORT_OFFSET (0x400U)
#define GPIO(port) ((struct gpio*)(uintptr_t)(GPIO_BASE_ADDR + (GPIO_PORT_OFFSET * port))) #define GPIO(port) ((struct gpio*)(uintptr_t)(GPIO_BASE_ADDR + (GPIO_PORT_OFFSET * port)))
@@ -2204,9 +2178,9 @@ typedef enum {
void gpio_set_mode(uint16_t pin, GPIO_MODE mode); void gpio_set_mode(uint16_t pin, GPIO_MODE mode);
void gpio_write(uint16_t pin, void gpio_write(uint16_t pin,
# 72 "src/gpio.h" 3 4 # 66 "src/gpio.h" 3 4
_Bool _Bool
# 72 "src/gpio.h" # 66 "src/gpio.h"
val); val);
# 6 "src/main.c" 2 # 6 "src/main.c" 2
# 1 "src/flash.h" 1 # 1 "src/flash.h" 1
@@ -2328,11 +2302,6 @@ struct usart {
#define USART_SR_TXE_TRANSMITTED (1 << USART_SR_TXE_BIT) #define USART_SR_TXE_TRANSMITTED (1 << USART_SR_TXE_BIT)
#define USART_SR_TC_BIT 6
#define USART_SR_TC_COMPLETED (1 << USART_SR_TC_BIT)
#define USART_SR_RXNE_BIT 5 #define USART_SR_RXNE_BIT 5
#define USART_SR_RXNE_READY (1 <<USART_SR_RXNE_BIT) #define USART_SR_RXNE_READY (1 <<USART_SR_RXNE_BIT)
@@ -2363,8 +2332,7 @@ struct usart {
void usart2_init(void); void usart2_init(void);
void usart2_start(void); void usart2_start(void);
void usart2_write_byte(uint8_t byte); void usart2_write_byte(char byte);
void usart2_write(char *buf);
# 10 "src/main.c" 2 # 10 "src/main.c" 2
#define exit 42 #define exit 42
@@ -2378,15 +2346,9 @@ static void system_clock_init(void) {
((struct pwr *) (0x40007000U))->CR |= ((0b11) << 14); ((struct pwr *) (0x40007000U))->CR |= ((0b11) << 14);
((struct rcc *) (0x40023800U))->CR &= ~(1 << 0);
((struct rcc *) (0x40023800U))->CR |= (1 << 16); ((struct rcc *) (0x40023800U))->CR |= (1 << 16);
((struct rcc *) (0x40023800U))->CR |= (1 << 19);
while (!(((struct rcc *) (0x40023800U))->CR & (1 << 17))); while (!(((struct rcc *) (0x40023800U))->CR & (1 << 17)));
@@ -2395,11 +2357,10 @@ static void system_clock_init(void) {
((struct rcc *) (0x40023800U))->CR &= ~(1 << 24); ((struct rcc *) (0x40023800U))->CR &= ~(1 << 24);
((struct rcc *) (0x40023800U))->PLLCFGR |= (1 << 22); ((struct rcc *) (0x40023800U))->PLLCFGR |= (1 << 22);
((struct rcc *) (0x40023800U))->PLLCFGR |= ((25 & (0b111111)) << 0) | ((192 & (0b111111111)) << 6) | ((2 & (0b11)) << 16) | ((4 & (0b1111)) << 24); ((struct rcc *) (0x40023800U))->PLLCFGR |= ((25 & (0b111111)) << 0) | ((196 & (0b111111111)) << 6) | ((2 & (0b11)) << 16) | ((4 & (0b1111)) << 24);
((struct rcc *) (0x40023800U))->CFGR &= ~((0b1111) << 4); ((struct rcc *) (0x40023800U))->CFGR &= ~((0b1111) << 4);
@@ -2418,28 +2379,26 @@ static void system_clock_init(void) {
while (!(((struct rcc *) (0x40023800U))->CR & (1 << 25))); while (!(((struct rcc *) (0x40023800U))->CR & (1 << 17)));
((struct flash *) (0x40023C00U))->ACR |= (1 <<10); ((struct flash *) (0x40023C00U))->ACR |= (1 <<10);
((struct flash *) (0x40023C00U))->ACR |= (1 <<9); ((struct flash *) (0x40023C00U))->ACR |= (1 <<9);
# 75 "src/main.c"
((struct rcc *) (0x40023800U))->CFGR |= (((0b10) & (0b11)) << 0);
((struct flash *) (0x40023C00U))->ACR &= ~((0b1111) << 0);
((struct rcc *) (0x40023800U))->CFGR |= ((0x0111) << 0);
((struct rcc *) (0x40023800U))->CFGR &= ~((0b11) << 0);
((struct rcc *) (0x40023800U))->CFGR |= ((0b10) << 0);
while (((((struct rcc *) (0x40023800U))->CFGR >> 2) & (0b11)) != (0b10)); while (((((struct rcc *) (0x40023800U))->CFGR >> 2) & (0b11)) != (0b10));
((struct rcc *) (0x40023800U))->CR &= ~(1 << 0);
((struct rcc *) (0x40023800U))->CFGR &= ~((0b11) << 21);
((struct rcc *) (0x40023800U))->CFGR |= ((0b00) << 21);
} }
int main(void) { int main(void) {
@@ -2456,21 +2415,20 @@ int main(void) {
uint16_t counter = ((struct timer *) (0x40000800U))->CNT; uint16_t counter = ((struct timer *) (0x40000800U))->CNT;
# 106 "src/main.c" 3 4 # 90 "src/main.c" 3 4
_Bool _Bool
# 106 "src/main.c" # 90 "src/main.c"
led_on = led_on =
# 106 "src/main.c" 3 4 # 90 "src/main.c" 3 4
((_Bool)+0u) ((_Bool)+0u)
# 106 "src/main.c" # 90 "src/main.c"
; ;
while(1) { while(1) {
if ((((struct timer *) (0x40000800U))->CNT - counter) >= 250) { if ((((struct timer *) (0x40000800U))->CNT - counter) >= 250) {
led_on = !led_on; led_on = !led_on;
gpio_write(led, led_on); gpio_write(led, led_on);
usart2_write("U\n"); usart2_write_byte('a');
counter = ((struct timer *) (0x40000800U))->CNT; counter = ((struct timer *) (0x40000800U))->CNT;
} }
build/main.o
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build/startup.S
+16 -16
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@@ -2923,8 +2923,6 @@ interrupt_vector_table:
.ascii "INOR__ >= ((maj) << 16) + (min))\000" .ascii "INOR__ >= ((maj) << 16) + (min))\000"
.LASF171: .LASF171:
.ascii "__DBL_MAX__ ((double)1.7976931348623157e+308L)\000" .ascii "__DBL_MAX__ ((double)1.7976931348623157e+308L)\000"
.LASF602:
.ascii "UINTMAX_C(x) __UINTMAX_C(x)\000"
.LASF253: .LASF253:
.ascii "__USFRACT_MIN__ 0.0UHR\000" .ascii "__USFRACT_MIN__ 0.0UHR\000"
.LASF578: .LASF578:
@@ -3022,8 +3020,8 @@ interrupt_vector_table:
.ascii "__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN__\000" .ascii "__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN__\000"
.LASF200: .LASF200:
.ascii "__FLT32_MIN_10_EXP__ (-37)\000" .ascii "__FLT32_MIN_10_EXP__ (-37)\000"
.LASF492: .LASF176:
.ascii "__int20\000" .ascii "__DBL_HAS_DENORM__ 1\000"
.LASF267: .LASF267:
.ascii "__LFRACT_IBIT__ 0\000" .ascii "__LFRACT_IBIT__ 0\000"
.LASF497: .LASF497:
@@ -3108,8 +3106,8 @@ interrupt_vector_table:
.ascii "__ARM_NEON\000" .ascii "__ARM_NEON\000"
.LASF401: .LASF401:
.ascii "__ARM_FEATURE_CMSE\000" .ascii "__ARM_FEATURE_CMSE\000"
.LASF68: .LASF625:
.ascii "__UINTPTR_TYPE__ unsigned int\000" .ascii "/home/alex/code/own/c-compile-experiments\000"
.LASF229: .LASF229:
.ascii "__FLT64_IS_IEC_60559__ 2\000" .ascii "__FLT64_IS_IEC_60559__ 2\000"
.LASF209: .LASF209:
@@ -3475,6 +3473,8 @@ interrupt_vector_table:
.ascii "UINT16_C(x) __UINT16_C(x)\000" .ascii "UINT16_C(x) __UINT16_C(x)\000"
.LASF344: .LASF344:
.ascii "__UTQ_FBIT__ 128\000" .ascii "__UTQ_FBIT__ 128\000"
.LASF499:
.ascii "__int20 +2\000"
.LASF610: .LASF610:
.ascii "long long int\000" .ascii "long long int\000"
.LASF24: .LASF24:
@@ -3539,8 +3539,8 @@ interrupt_vector_table:
.ascii "__STDC__ 1\000" .ascii "__STDC__ 1\000"
.LASF17: .LASF17:
.ascii "__SIZEOF_LONG__ 4\000" .ascii "__SIZEOF_LONG__ 4\000"
.LASF499: .LASF492:
.ascii "__int20 +2\000" .ascii "__int20\000"
.LASF168: .LASF168:
.ascii "__DBL_MAX_EXP__ 1024\000" .ascii "__DBL_MAX_EXP__ 1024\000"
.LASF585: .LASF585:
@@ -3567,8 +3567,6 @@ interrupt_vector_table:
.ascii "__SCHAR_WIDTH__ 8\000" .ascii "__SCHAR_WIDTH__ 8\000"
.LASF298: .LASF298:
.ascii "__ACCUM_MIN__ (-0X1P15K-0X1P15K)\000" .ascii "__ACCUM_MIN__ (-0X1P15K-0X1P15K)\000"
.LASF40:
.ascii "__CHAR16_TYPE__ short unsigned int\000"
.LASF21: .LASF21:
.ascii "__SIZEOF_DOUBLE__ 8\000" .ascii "__SIZEOF_DOUBLE__ 8\000"
.LASF7: .LASF7:
@@ -3803,8 +3801,8 @@ interrupt_vector_table:
.ascii "SIZE_MAX (__SIZE_MAX__)\000" .ascii "SIZE_MAX (__SIZE_MAX__)\000"
.LASF54: .LASF54:
.ascii "__INT_LEAST64_TYPE__ long long int\000" .ascii "__INT_LEAST64_TYPE__ long long int\000"
.LASF128: .LASF602:
.ascii "__INT_FAST16_MAX__ 0x7fffffff\000" .ascii "UINTMAX_C(x) __UINTMAX_C(x)\000"
.LASF49: .LASF49:
.ascii "__UINT32_TYPE__ long unsigned int\000" .ascii "__UINT32_TYPE__ long unsigned int\000"
.LASF183: .LASF183:
@@ -3881,8 +3879,8 @@ interrupt_vector_table:
.ascii "INT64_MAX (__INT64_MAX__)\000" .ascii "INT64_MAX (__INT64_MAX__)\000"
.LASF518: .LASF518:
.ascii "_INT8_T_DECLARED \000" .ascii "_INT8_T_DECLARED \000"
.LASF625: .LASF40:
.ascii "/home/alex/code/own/stm32-falling-sand\000" .ascii "__CHAR16_TYPE__ short unsigned int\000"
.LASF370: .LASF370:
.ascii "__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 1\000" .ascii "__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 1\000"
.LASF151: .LASF151:
@@ -4046,8 +4044,8 @@ interrupt_vector_table:
.ascii "__FLT32X_MAX_10_EXP__ 308\000" .ascii "__FLT32X_MAX_10_EXP__ 308\000"
.LASF140: .LASF140:
.ascii "__UINTPTR_MAX__ 0xffffffffU\000" .ascii "__UINTPTR_MAX__ 0xffffffffU\000"
.LASF176: .LASF128:
.ascii "__DBL_HAS_DENORM__ 1\000" .ascii "__INT_FAST16_MAX__ 0x7fffffff\000"
.LASF32: .LASF32:
.ascii "__GNUC_EXECUTION_CHARSET_NAME \"UTF-8\"\000" .ascii "__GNUC_EXECUTION_CHARSET_NAME \"UTF-8\"\000"
.LASF475: .LASF475:
@@ -4074,6 +4072,8 @@ interrupt_vector_table:
.ascii "long +4\000" .ascii "long +4\000"
.LASF534: .LASF534:
.ascii "__int_least8_t_defined 1\000" .ascii "__int_least8_t_defined 1\000"
.LASF68:
.ascii "__UINTPTR_TYPE__ unsigned int\000"
.LASF92: .LASF92:
.ascii "__UINTMAX_MAX__ 0xffffffffffffffffULL\000" .ascii "__UINTMAX_MAX__ 0xffffffffffffffffULL\000"
.LASF42: .LASF42:
build/startup.i
+1 -1
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@@ -1,5 +1,5 @@
# 0 "src/startup.c" # 0 "src/startup.c"
# 1 "/home/alex/code/own/stm32-falling-sand//" # 1 "/home/alex/code/own/c-compile-experiments//"
# 0 "<built-in>" # 0 "<built-in>"
#define __STDC__ 1 #define __STDC__ 1
# 0 "<built-in>" # 0 "<built-in>"
build/startup.o
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build/timer.S
+215 -274
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build/timer.i
+1 -21
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@@ -1,5 +1,5 @@
# 0 "src/timer.c" # 0 "src/timer.c"
# 1 "/home/alex/code/own/stm32-falling-sand//" # 1 "/home/alex/code/own/c-compile-experiments//"
# 0 "<built-in>" # 0 "<built-in>"
#define __STDC__ 1 #define __STDC__ 1
# 0 "<built-in>" # 0 "<built-in>"
@@ -2014,11 +2014,6 @@ struct rcc {
#define RCC_CR_PLLON_ON (1 << RCC_CR_PLLON_BIT) #define RCC_CR_PLLON_ON (1 << RCC_CR_PLLON_BIT)
#define RCC_CR_CSS_BIT 19
#define RCC_CR_CSS_ON (1 << RCC_CR_CSS_BIT)
#define RCC_CR_HSERDY_BIT 17 #define RCC_CR_HSERDY_BIT 17
#define RCC_CR_HSERDY_READY (1 << RCC_CR_HSERDY_BIT) #define RCC_CR_HSERDY_READY (1 << RCC_CR_HSERDY_BIT)
@@ -2041,7 +2036,6 @@ struct rcc {
#define RCC_PLLCFGR_PLLSRC_BIT 22 #define RCC_PLLCFGR_PLLSRC_BIT 22
#define RCC_PLLCFGR_PLLSRC_HSE (1 << RCC_PLLCFGR_PLLSRC_BIT) #define RCC_PLLCFGR_PLLSRC_HSE (1 << RCC_PLLCFGR_PLLSRC_BIT)
#define RCC_PLLCFGR_PLLSRC_HSI (0 << RCC_PLLCFGR_PLLSRC_BIT)
#define RCC_PLLCFGR_PLLP_BIT 16 #define RCC_PLLCFGR_PLLP_BIT 16
#define RCC_PLLCFGR_PLLP_MASK (0b11) #define RCC_PLLCFGR_PLLP_MASK (0b11)
@@ -2061,19 +2055,6 @@ struct rcc {
#define RCC_CFGR_PPRE_DIV_2 (0b100) #define RCC_CFGR_PPRE_DIV_2 (0b100)
#define RCC_CFGR_MCO1_HSI (0b00)
#define RCC_CFGR_MCO1_HSE (0b10)
#define RCC_CFGR_MCO1_PLL (0b11)
#define RCC_CFGR_MCO1_BIT 21
#define RCC_CFGR_MCO1_MASK (0b11)
#define RCC_CFGR_MCO1PRE_DIV4 (0b110)
#define RCC_CFGR_MCO1PRE_BIT 24
#define RCC_CFGR_MCO1PRE_MASK (0b111)
#define RCC_CFGR_PPRE2_BIT 13 #define RCC_CFGR_PPRE2_BIT 13
#define RCC_CFGR_PPRE2_MASK (0b111) #define RCC_CFGR_PPRE2_MASK (0b111)
@@ -2094,7 +2075,6 @@ struct rcc {
#define RCC_CFGR_SWS_MASK (0b11) #define RCC_CFGR_SWS_MASK (0b11)
#define RCC_CFGR_SW_PLL (0b10)
#define RCC_CFGR_SW_PLL (0b10) #define RCC_CFGR_SW_PLL (0b10)
#define RCC_CFGR_SW_BIT 0 #define RCC_CFGR_SW_BIT 0
build/timer.o
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build/usart.S
+497 -733
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File diff suppressed because it is too large Load Diff
build/usart.i
+20 -64
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@@ -1,5 +1,5 @@
# 0 "src/usart.c" # 0 "src/usart.c"
# 1 "/home/alex/code/own/stm32-falling-sand//" # 1 "/home/alex/code/own/c-compile-experiments//"
# 0 "<built-in>" # 0 "<built-in>"
#define __STDC__ 1 #define __STDC__ 1
# 0 "<built-in>" # 0 "<built-in>"
@@ -2014,11 +2014,6 @@ struct rcc {
#define RCC_CR_PLLON_ON (1 << RCC_CR_PLLON_BIT) #define RCC_CR_PLLON_ON (1 << RCC_CR_PLLON_BIT)
#define RCC_CR_CSS_BIT 19
#define RCC_CR_CSS_ON (1 << RCC_CR_CSS_BIT)
#define RCC_CR_HSERDY_BIT 17 #define RCC_CR_HSERDY_BIT 17
#define RCC_CR_HSERDY_READY (1 << RCC_CR_HSERDY_BIT) #define RCC_CR_HSERDY_READY (1 << RCC_CR_HSERDY_BIT)
@@ -2041,7 +2036,6 @@ struct rcc {
#define RCC_PLLCFGR_PLLSRC_BIT 22 #define RCC_PLLCFGR_PLLSRC_BIT 22
#define RCC_PLLCFGR_PLLSRC_HSE (1 << RCC_PLLCFGR_PLLSRC_BIT) #define RCC_PLLCFGR_PLLSRC_HSE (1 << RCC_PLLCFGR_PLLSRC_BIT)
#define RCC_PLLCFGR_PLLSRC_HSI (0 << RCC_PLLCFGR_PLLSRC_BIT)
#define RCC_PLLCFGR_PLLP_BIT 16 #define RCC_PLLCFGR_PLLP_BIT 16
#define RCC_PLLCFGR_PLLP_MASK (0b11) #define RCC_PLLCFGR_PLLP_MASK (0b11)
@@ -2061,19 +2055,6 @@ struct rcc {
#define RCC_CFGR_PPRE_DIV_2 (0b100) #define RCC_CFGR_PPRE_DIV_2 (0b100)
#define RCC_CFGR_MCO1_HSI (0b00)
#define RCC_CFGR_MCO1_HSE (0b10)
#define RCC_CFGR_MCO1_PLL (0b11)
#define RCC_CFGR_MCO1_BIT 21
#define RCC_CFGR_MCO1_MASK (0b11)
#define RCC_CFGR_MCO1PRE_DIV4 (0b110)
#define RCC_CFGR_MCO1PRE_BIT 24
#define RCC_CFGR_MCO1PRE_MASK (0b111)
#define RCC_CFGR_PPRE2_BIT 13 #define RCC_CFGR_PPRE2_BIT 13
#define RCC_CFGR_PPRE2_MASK (0b111) #define RCC_CFGR_PPRE2_MASK (0b111)
@@ -2094,7 +2075,6 @@ struct rcc {
#define RCC_CFGR_SWS_MASK (0b11) #define RCC_CFGR_SWS_MASK (0b11)
#define RCC_CFGR_SW_PLL (0b10)
#define RCC_CFGR_SW_PLL (0b10) #define RCC_CFGR_SW_PLL (0b10)
#define RCC_CFGR_SW_BIT 0 #define RCC_CFGR_SW_BIT 0
@@ -2152,21 +2132,13 @@ struct gpio {
#define GPIOA ((struct gpio *) GPIOA_BASE_ADDR) #define GPIOA ((struct gpio *) GPIOA_BASE_ADDR)
#define GPIO_MODER_AF_MODE (0b10) #define GPIO_MODER_MODER3_BIT 7
#define GPIO_MODER_MODER8_BIT 16
#define GPIO_MODER_MODER8_MASK (0b11)
#define GPIO_MODER_MODER3_BIT 6
#define GPIO_MODER_MODER3_MASK (0b11) #define GPIO_MODER_MODER3_MASK (0b11)
#define GPIO_MODER_MODER3_AF (0b10)
#define GPIO_MODER_MODER2_BIT 4 #define GPIO_MODER_MODER2_BIT 4
#define GPIO_MODER_MODER2_MASK (0b11) #define GPIO_MODER_MODER2_MASK (0b11)
#define GPIO_MODER_MODER2_AF (0b10)
#define GPIO_AFRH_AFRH8_BIT 0
#define GPIO_AFRH_AFRH8_MASK (0b1111)
#define GPIO_AFRH_AFRH8_MCO_1 (0b0000)
#define GPIO_AFRL_AFRL3_BIT 12 #define GPIO_AFRL_AFRL3_BIT 12
@@ -2180,6 +2152,8 @@ struct gpio {
#define GPIO_BASE_ADDR (0x40020000U) #define GPIO_BASE_ADDR (0x40020000U)
#define GPIO_PORT_OFFSET (0x400U) #define GPIO_PORT_OFFSET (0x400U)
#define GPIO(port) ((struct gpio*)(uintptr_t)(GPIO_BASE_ADDR + (GPIO_PORT_OFFSET * port))) #define GPIO(port) ((struct gpio*)(uintptr_t)(GPIO_BASE_ADDR + (GPIO_PORT_OFFSET * port)))
@@ -2201,9 +2175,9 @@ typedef enum {
void gpio_set_mode(uint16_t pin, GPIO_MODE mode); void gpio_set_mode(uint16_t pin, GPIO_MODE mode);
void gpio_write(uint16_t pin, void gpio_write(uint16_t pin,
# 72 "src/gpio.h" 3 4 # 66 "src/gpio.h" 3 4
_Bool _Bool
# 72 "src/gpio.h" # 66 "src/gpio.h"
val); val);
# 3 "src/usart.c" 2 # 3 "src/usart.c" 2
# 1 "src/usart.h" 1 # 1 "src/usart.h" 1
@@ -2231,11 +2205,6 @@ struct usart {
#define USART_SR_TXE_TRANSMITTED (1 << USART_SR_TXE_BIT) #define USART_SR_TXE_TRANSMITTED (1 << USART_SR_TXE_BIT)
#define USART_SR_TC_BIT 6
#define USART_SR_TC_COMPLETED (1 << USART_SR_TC_BIT)
#define USART_SR_RXNE_BIT 5 #define USART_SR_RXNE_BIT 5
#define USART_SR_RXNE_READY (1 <<USART_SR_RXNE_BIT) #define USART_SR_RXNE_READY (1 <<USART_SR_RXNE_BIT)
@@ -2266,8 +2235,7 @@ struct usart {
void usart2_init(void); void usart2_init(void);
void usart2_start(void); void usart2_start(void);
void usart2_write_byte(uint8_t byte); void usart2_write_byte(char byte);
void usart2_write(char *buf);
# 4 "src/usart.c" 2 # 4 "src/usart.c" 2
void usart2_init(void) { void usart2_init(void) {
@@ -2275,11 +2243,10 @@ void usart2_init(void) {
((struct rcc *) (0x40023800U))->AHB1ENR |= (1 << 0); ((struct rcc *) (0x40023800U))->AHB1ENR |= (1 << 0);
((struct gpio *) (0x40020000U))->MODER &= ~((0b11) << 4); ((struct gpio *) (0x40020000U))->MODER &= ~((0b11) << 4);
((struct gpio *) (0x40020000U))->MODER |= ((0b10) << 4); ((struct gpio *) (0x40020000U))->MODER |= ((0b10) << 4);
((struct gpio *) (0x40020000U))->MODER &= ~((0b11) << 6); ((struct gpio *) (0x40020000U))->MODER &= ~((0b11) << 7);
((struct gpio *) (0x40020000U))->MODER |= ((0b10) << 6); ((struct gpio *) (0x40020000U))->MODER |= ((0b10) << 7);
((struct gpio *) (0x40020000U))->AFRL &= ~((0b1111) << 8); ((struct gpio *) (0x40020000U))->AFRL &= ~((0b1111) << 8);
@@ -2288,25 +2255,19 @@ void usart2_init(void) {
((struct gpio *) (0x40020000U))->AFRL |= ((0b0111) << 12); ((struct gpio *) (0x40020000U))->AFRL |= ((0b0111) << 12);
((struct gpio *) (0x40020000U))->MODER &= ~((0b11) << 16); ((struct rcc *) (0x40023800U))->AHB1ENR |= (1 << 17);
((struct gpio *) (0x40020000U))->MODER |= ((0b10) << 16);
((struct gpio *) (0x40020000U))->AFRH &= ~((0b1111) << 0);
((struct gpio *) (0x40020000U))->AFRH |= ((0b0000) << 0);
((struct rcc *) (0x40023800U))->APB1ENR |= (1 << 17);
((struct usart *) (0x40004400U))->CR1 = 0; ((struct usart *) (0x40004400U))->CR1 = 0;
((struct usart *) (0x40004400U))->CR2 = 0; ((struct usart *) (0x40004400U))->CR2 = 0;
((struct usart *) (0x40004400U))->CR3 = 0; ((struct usart *) (0x40004400U))->CR3 = 0;
# 55 "src/usart.c" # 49 "src/usart.c"
((struct usart *) (0x40004400U))->BRR &= ~((0b111111111111) << 4); ((struct usart *) (0x40004400U))->CR1 |= (1 << 15);
((struct usart *) (0x40004400U))->BRR |= (0x68 << 4);
((struct usart *) (0x40004400U))->BRR |= (0x2AB << 0); ((struct usart *) (0x40004400U))->BRR &= ~((0b111111111111) << 4);
((struct usart *) (0x40004400U))->BRR |= (0x34 << 4);
((struct usart *) (0x40004400U))->BRR &= ~((0b111) << 0);
((struct usart *) (0x40004400U))->BRR |= (0x0 << 0);
((struct usart *) (0x40004400U))->CR1 |= (1 << 3); ((struct usart *) (0x40004400U))->CR1 |= (1 << 3);
@@ -2317,15 +2278,10 @@ void usart2_start(void) {
((struct usart *) (0x40004400U))->CR1 |= (1 << 13); ((struct usart *) (0x40004400U))->CR1 |= (1 << 13);
} }
void usart2_write_byte(uint8_t c) { void usart2_write_byte(char c) {
((struct usart *) (0x40004400U))->DR = c; ((struct usart *) (0x40004400U))->DR = c;
while ((((struct usart *) (0x40004400U))->SR & (1 << 7)) == 0);
while (!(((struct usart *) (0x40004400U))->SR & (1 << 6)));
}
void usart2_write(char *buf) {
while (*buf) usart2_write_byte(*buf++);
} }
build/usart.o
BIN
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flake.nix
+28 -30
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@@ -5,38 +5,36 @@
nixpkgs.url = "github:nixos/nixpkgs/nixos-unstable"; nixpkgs.url = "github:nixos/nixpkgs/nixos-unstable";
}; };
outputs = outputs = { nixpkgs, ... }:
{ nixpkgs, ... }:
let let
systems = [ "x86_64-linux" ]; systems = [ "x86_64-linux" ];
in in
{ {
config = { config = {
nixpkgs.config.allowUnfree = true; nixpkgs.config.allowUnfree = true;
}; };
devShells = nixpkgs.lib.genAttrs systems ( devShells = nixpkgs.lib.genAttrs systems (system:
system: let
let # pkgs = nixpkgs.legacyPackages.${system};
# pkgs = nixpkgs.legacyPackages.${system}; pkgs = import nixpkgs {
pkgs = import nixpkgs { inherit system;
inherit system; config.allowUnfree = true;
config.allowUnfree = true; };
}; in
in {
{ default = pkgs.mkShell {
default = pkgs.mkShell { packages = [
packages = [ pkgs.gnumake
pkgs.gnumake pkgs.gcc-arm-embedded
pkgs.gcc-arm-embedded pkgs.stlink
pkgs.stlink pkgs.gdb
pkgs.gdb pkgs.openocd
pkgs.openocd pkgs.stm32cubemx
pkgs.stm32cubemx pkgs.gdbgui
pkgs.gdbgui ];
]; };
}; }
} );
); };
};
} }
src/gpio.h
+8 -14
View File
@@ -21,34 +21,28 @@ struct gpio {
#define GPIOA ((struct gpio *) GPIOA_BASE_ADDR) #define GPIOA ((struct gpio *) GPIOA_BASE_ADDR)
// MODER register // MODER register
#define GPIO_MODER_AF_MODE (0b10) #define GPIO_MODER_MODER3_BIT 7 // Bits [7:6]
#define GPIO_MODER_MODER8_BIT 16 // Bits [17:16]
#define GPIO_MODER_MODER8_MASK (0b11)
#define GPIO_MODER_MODER3_BIT 6 // Bits [7:6]
#define GPIO_MODER_MODER3_MASK (0b11) #define GPIO_MODER_MODER3_MASK (0b11)
#define GPIO_MODER_MODER3_AF (0b10)
#define GPIO_MODER_MODER2_BIT 4 // Bits [5:4] #define GPIO_MODER_MODER2_BIT 4 // Bits [5:4]
#define GPIO_MODER_MODER2_MASK (0b11) #define GPIO_MODER_MODER2_MASK (0b11)
#define GPIO_MODER_MODER2_AF (0b10)
// AFRH register
#define GPIO_AFRH_AFRH8_BIT 0 // Bits [3:0]
#define GPIO_AFRH_AFRH8_MASK (0b1111)
#define GPIO_AFRH_AFRH8_MCO_1 (0b0000) // Alternative function 0 (AF0)
// AFRL register // AFRL register
#define GPIO_AFRL_AFRL3_BIT 12 // Bits [15:12] #define GPIO_AFRL_AFRL3_BIT 12 // Bits [15:12]
#define GPIO_AFRL_AFRL3_MASK (0b1111) #define GPIO_AFRL_AFRL3_MASK (0b1111)
#define GPIO_AFRL_AFRL3_USART2_RX (0b0111) // Alternative function 7 (AF7) #define GPIO_AFRL_AFRL3_USART2_RX (0b0111) // Alternative function 7
#define GPIO_AFRL_AFRL2_BIT 8 // Bits [11:8] #define GPIO_AFRL_AFRL2_BIT 8 // Bits [11:8]
#define GPIO_AFRL_AFRL2_MASK (0b1111) #define GPIO_AFRL_AFRL2_MASK (0b1111)
#define GPIO_AFRL_AFRL2_USART2_TX (0b0111) // Alternative function 7 (AF7) #define GPIO_AFRL_AFRL2_USART2_TX (0b0111) // Alternative function 7
// TODO did I intend to remove GPIO, BIT, PIN etc below with GPIOA, GPIOB etc?
#define GPIO_BASE_ADDR (0x40020000U) #define GPIO_BASE_ADDR (0x40020000U)
#define GPIO_PORT_OFFSET (0x400U) #define GPIO_PORT_OFFSET (0x400U)
#define GPIO(port) ((struct gpio*)(uintptr_t)(GPIO_BASE_ADDR + (GPIO_PORT_OFFSET * port))) #define GPIO(port) ((struct gpio*)(uintptr_t)(GPIO_BASE_ADDR + (GPIO_PORT_OFFSET * port)))
src/main.c
+9 -26
View File
@@ -18,15 +18,9 @@ static void system_clock_init(void) {
PWR->CR &= ~(PWR_CR_VOS_MASK << PWR_CR_VOS_BIT); PWR->CR &= ~(PWR_CR_VOS_MASK << PWR_CR_VOS_BIT);
PWR->CR |= (PWR_SCALE3 << PWR_CR_VOS_BIT); PWR->CR |= (PWR_SCALE3 << PWR_CR_VOS_BIT);
// Turn off HSI (which is on by default)
RCC->CR &= ~RCC_CR_HSION_ON;
// Turn on HSE // Turn on HSE
RCC->CR |= RCC_CR_HSEON_ON; RCC->CR |= RCC_CR_HSEON_ON;
// Turn on clock security system
RCC->CR |= RCC_CR_CSS_ON;
// Wait indefinitely for HSE to be ready // Wait indefinitely for HSE to be ready
// TODO indicate error/timeout somehow? // TODO indicate error/timeout somehow?
while (!(RCC->CR & RCC_CR_HSERDY_READY)); while (!(RCC->CR & RCC_CR_HSERDY_READY));
@@ -36,11 +30,10 @@ static void system_clock_init(void) {
RCC->CR &= ~RCC_CR_PLLON_ON; RCC->CR &= ~RCC_CR_PLLON_ON;
// Set HSE as PLL source // Set HSE as PLL source
/* RCC->PLLCFGR |= RCC_PLLCFGR_PLLSRC_HSE; */
RCC->PLLCFGR |= RCC_PLLCFGR_PLLSRC_HSE; RCC->PLLCFGR |= RCC_PLLCFGR_PLLSRC_HSE;
// Settings to achieve system clock of 96Mhz // Settings to achieve system clock of 96Mhz
RCC->PLLCFGR |= RCC_PLLCFGR_PLLM(25) | RCC_PLLCFGR_PLLN(192) | RCC_PLLCFGR_PLLP(2) | RCC_PLLCFGR_PLLQ(4); RCC->PLLCFGR |= RCC_PLLCFGR_PLLM(25) | RCC_PLLCFGR_PLLN(196) | RCC_PLLCFGR_PLLP(2) | RCC_PLLCFGR_PLLQ(4);
// Set AHB prescalar to /1 // Set AHB prescalar to /1
RCC->CFGR &= ~(RCC_CFGR_HPRE_MASK << RCC_CFGR_HPRE_BIT); RCC->CFGR &= ~(RCC_CFGR_HPRE_MASK << RCC_CFGR_HPRE_BIT);
@@ -59,35 +52,26 @@ static void system_clock_init(void) {
// Wait indefinitely for PLL to be ready // Wait indefinitely for PLL to be ready
// TODO indicate error/timeout somehow? // TODO indicate error/timeout somehow?
while (!(RCC->CR & RCC_CR_PLLRDY_LOCKED)); while (!(RCC->CR & RCC_CR_HSERDY_READY));
// Enable caching of instructions and data // Enable caching of instructions and data
FLASH->ACR |= FLASH_ACR_DCEN_ENABLE; FLASH->ACR |= FLASH_ACR_DCEN_ENABLE;
FLASH->ACR |= FLASH_ACR_ICEN_ENABLE; FLASH->ACR |= FLASH_ACR_ICEN_ENABLE;
// Set latency to be 3 wait states (TODO: understand why exactly 3) // Set latency to be 3 wait states (TODO: understand why exactly 3)
/* FLASH->ACR &= ~(FLASH_ACR_LATENCY_MASK << FLASH_ACR_LATENCY_BIT); */ FLASH->ACR &= ~(FLASH_ACR_LATENCY_MASK << FLASH_ACR_LATENCY_BIT);
/* RCC->CFGR |= (FLASH_ACR_LATENCY_3_WAIT_STATES << FLASH_ACR_LATENCY_BIT); */ RCC->CFGR |= (FLASH_ACR_LATENCY_3_WAIT_STATES << FLASH_ACR_LATENCY_BIT);
// Use PLL as system clock // Use PLL as system clock
/* RCC->CFGR &= ~(RCC_CFGR_SW_MASK << RCC_CFGR_SW_BIT); */ RCC->CFGR &= ~(RCC_CFGR_SW_MASK << RCC_CFGR_SW_BIT);
/* RCC->CFGR |= (RCC_CFGR_SW_PLL << RCC_CFGR_SW_BIT); */ RCC->CFGR |= (RCC_CFGR_SW_PLL << RCC_CFGR_SW_BIT);
RCC->CFGR |= RCC_CFGR_SW(RCC_CFGR_SW_PLL);
// Wait indefinitely for PLL clock to be selected // Wait indefinitely for PLL clock to be selected
// TODO indicate error/timeout somehow? // TODO indicate error/timeout somehow?
while (((RCC->CFGR >> RCC_CFGR_SWS_BIT) & RCC_CFGR_SWS_MASK) != RCC_CFGR_SWS_PLL); while (((RCC->CFGR >> RCC_CFGR_SWS_BIT) & RCC_CFGR_SWS_MASK) != RCC_CFGR_SWS_PLL);
// Turn off HSI (which is on by default)
// Output HSE clock RCC->CR &= ~RCC_CR_HSION_ON;
RCC->CFGR &= ~(RCC_CFGR_MCO1_MASK << RCC_CFGR_MCO1_BIT);
/* RCC->CFGR |= (RCC_CFGR_MCO1_HSE << RCC_CFGR_MCO1_BIT); */
/* RCC->CFGR |= (RCC_CFGR_MCO1_PLL << RCC_CFGR_MCO1_BIT); */
RCC->CFGR |= (RCC_CFGR_MCO1_HSI << RCC_CFGR_MCO1_BIT);
/* RCC->CFGR &= ~(RCC_CFGR_MCO1PRE_MASK << RCC_CFGR_MCO1PRE_BIT); */
/* RCC->CFGR |= (RCC_CFGR_MCO1PRE_DIV4 << RCC_CFGR_MCO1PRE_BIT); */
} }
int main(void) { int main(void) {
@@ -105,12 +89,11 @@ int main(void) {
uint16_t counter = TIM4->CNT; uint16_t counter = TIM4->CNT;
bool led_on = false; bool led_on = false;
while(1) { while(1) {
/* usart2_write("U\n"); */
if ((TIM4->CNT - counter) >= 250) { if ((TIM4->CNT - counter) >= 250) {
led_on = !led_on; led_on = !led_on;
gpio_write(led, led_on); gpio_write(led, led_on);
usart2_write("U\n"); usart2_write_byte('a');
counter = TIM4->CNT; counter = TIM4->CNT;
} }
src/rcc.h
-20
View File
@@ -46,11 +46,6 @@ struct rcc {
#define RCC_CR_PLLON_BIT 24 #define RCC_CR_PLLON_BIT 24
#define RCC_CR_PLLON_ON (1 << RCC_CR_PLLON_BIT) #define RCC_CR_PLLON_ON (1 << RCC_CR_PLLON_BIT)
// Clock security system
#define RCC_CR_CSS_BIT 19
#define RCC_CR_CSS_ON (1 << RCC_CR_CSS_BIT)
// HSE clock ready flag // HSE clock ready flag
#define RCC_CR_HSERDY_BIT 17 #define RCC_CR_HSERDY_BIT 17
#define RCC_CR_HSERDY_READY (1 << RCC_CR_HSERDY_BIT) #define RCC_CR_HSERDY_READY (1 << RCC_CR_HSERDY_BIT)
@@ -74,7 +69,6 @@ struct rcc {
#define RCC_PLLCFGR_PLLSRC_BIT 22 #define RCC_PLLCFGR_PLLSRC_BIT 22
#define RCC_PLLCFGR_PLLSRC_HSE (1 << RCC_PLLCFGR_PLLSRC_BIT) #define RCC_PLLCFGR_PLLSRC_HSE (1 << RCC_PLLCFGR_PLLSRC_BIT)
#define RCC_PLLCFGR_PLLSRC_HSI (0 << RCC_PLLCFGR_PLLSRC_BIT)
#define RCC_PLLCFGR_PLLP_BIT 16 // Bits [17:16] #define RCC_PLLCFGR_PLLP_BIT 16 // Bits [17:16]
#define RCC_PLLCFGR_PLLP_MASK (0b11) #define RCC_PLLCFGR_PLLP_MASK (0b11)
@@ -93,19 +87,6 @@ struct rcc {
#define RCC_CFGR_PPRE_DIV_NONE 0 #define RCC_CFGR_PPRE_DIV_NONE 0
#define RCC_CFGR_PPRE_DIV_2 (0b100) #define RCC_CFGR_PPRE_DIV_2 (0b100)
// Microcontroller clock output 1
#define RCC_CFGR_MCO1_HSI (0b00)
#define RCC_CFGR_MCO1_HSE (0b10)
#define RCC_CFGR_MCO1_PLL (0b11)
#define RCC_CFGR_MCO1_BIT 21 // Bits [22:21]
#define RCC_CFGR_MCO1_MASK (0b11)
#define RCC_CFGR_MCO1PRE_DIV4 (0b110)
#define RCC_CFGR_MCO1PRE_BIT 24 // Bits [26:24]
#define RCC_CFGR_MCO1PRE_MASK (0b111)
// APB2 // APB2
#define RCC_CFGR_PPRE2_BIT 13 // Bits [15:13] #define RCC_CFGR_PPRE2_BIT 13 // Bits [15:13]
#define RCC_CFGR_PPRE2_MASK (0b111) #define RCC_CFGR_PPRE2_MASK (0b111)
@@ -128,7 +109,6 @@ struct rcc {
// System clock switch // System clock switch
#define RCC_CFGR_SW_PLL (0b10) #define RCC_CFGR_SW_PLL (0b10)
#define RCC_CFGR_SW_PLL (0b10)
#define RCC_CFGR_SW_BIT 0 // Bits [1:0] #define RCC_CFGR_SW_BIT 0 // Bits [1:0]
#define RCC_CFGR_SW_MASK (0b11) #define RCC_CFGR_SW_MASK (0b11)
src/usart.c
+24 -33
View File
@@ -7,11 +7,10 @@ void usart2_init(void) {
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN_ENABLE; RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN_ENABLE;
// Configure PA2 and PA3 (USART2 pins) to use alternative functions // Configure PA2 and PA3 (USART2 pins) to use alternative functions
// file:///home/alex/sync/org/stm32-sand/stm32f411ce.pdf#page=48
GPIOA->MODER &= ~(GPIO_MODER_MODER2_MASK << GPIO_MODER_MODER2_BIT); GPIOA->MODER &= ~(GPIO_MODER_MODER2_MASK << GPIO_MODER_MODER2_BIT);
GPIOA->MODER |= (GPIO_MODER_AF_MODE << GPIO_MODER_MODER2_BIT); GPIOA->MODER |= (GPIO_MODER_MODER2_AF << GPIO_MODER_MODER2_BIT);
GPIOA->MODER &= ~(GPIO_MODER_MODER3_MASK << GPIO_MODER_MODER3_BIT); GPIOA->MODER &= ~(GPIO_MODER_MODER3_MASK << GPIO_MODER_MODER3_BIT);
GPIOA->MODER |= (GPIO_MODER_AF_MODE << GPIO_MODER_MODER3_BIT); GPIOA->MODER |= (GPIO_MODER_MODER3_AF << GPIO_MODER_MODER3_BIT);
// Set pin alternative modes to use USART // Set pin alternative modes to use USART
GPIOA->AFRL &= ~(GPIO_AFRL_AFRL2_MASK << GPIO_AFRL_AFRL2_BIT); GPIOA->AFRL &= ~(GPIO_AFRL_AFRL2_MASK << GPIO_AFRL_AFRL2_BIT);
@@ -19,16 +18,8 @@ void usart2_init(void) {
GPIOA->AFRL &= ~(GPIO_AFRL_AFRL3_MASK << GPIO_AFRL_AFRL3_BIT); GPIOA->AFRL &= ~(GPIO_AFRL_AFRL3_MASK << GPIO_AFRL_AFRL3_BIT);
GPIOA->AFRL |= (GPIO_AFRL_AFRL3_USART2_RX << GPIO_AFRL_AFRL3_BIT); GPIOA->AFRL |= (GPIO_AFRL_AFRL3_USART2_RX << GPIO_AFRL_AFRL3_BIT);
// Configure PA8 to output HSE (MCO1)
GPIOA->MODER &= ~(GPIO_MODER_MODER8_MASK << GPIO_MODER_MODER8_BIT);
GPIOA->MODER |= (GPIO_MODER_AF_MODE << GPIO_MODER_MODER8_BIT);
// Set pin alternative mode to use MCO1
GPIOA->AFRH &= ~(GPIO_AFRH_AFRH8_MASK << GPIO_AFRH_AFRH8_BIT);
GPIOA->AFRH |= (GPIO_AFRH_AFRH8_MCO_1 << GPIO_AFRH_AFRH8_BIT);
// Enable USART // Enable USART
RCC->APB1ENR |= RCC_APB1ENR_USART2EN_ENABLE; RCC->AHB1ENR |= RCC_APB1ENR_USART2EN_ENABLE;
// Clear control registers // Clear control registers
USART2->CR1 = 0; USART2->CR1 = 0;
@@ -36,26 +27,31 @@ void usart2_init(void) {
USART2->CR3 = 0; USART2->CR3 = 0;
// Calculate Baud rate: // Calculate Baud rate:
// baud = f_clck / (8 * (2 - OVER8) * USARTDIV) => // baud = f_clock / (8 * (2 - OVER8) * USARTDIV); =>
// (8 * (2 - OVER8) * USARTDIV) = f_clock / baud => // (8 * (2 - OVER8) * USARTDIV) = f_clock / baud; =>
// baud * (8 * (2 - OVER8) * USARTDIV) = f_clock => // USARTDIV = (f_clock / (baud * (8 * (2 - OVER8))); =>
// USARTDIV = (f_clock / (baud * (8 * (2 - OVER8)))
// Target Baud rate = 115200, f_clock = 48MHz,OVER8 = 0 // Target Baud rate = 115200, f_clock = 48MHz
// USARTDIV = (48E6 / (115200 * (8 * 2))) = 26.0416666 // With OVER8 = 1 (oversampling by 8)
// mantissa = 26 // USARTDIV = (48E6 / (115200 * (8 * (2 - 1))) = 52.083
// fraction = 0.041666 * 16 = 0.666656 ~= 1 // mantissa = 52
// fraction = 0.083 * 8 = 0.664 ~= 1
// baud = 48E6 / (8 * 2 * 26) = 115384.61538461539 // rounding fraction up: USARTDIV = 53
// error of 0.001% (115384.61538461539 / 115200 ) = 1.001602564102564 // baud = 48E6 / (8 * (52 + 1)) = 113207.54716981133
// error of 0.1% (115200 / 113207.54716981133)
/* USART2->CR1 |= USART_CR1_OVER8_8; */ // rounding fraction down: USARTDIV = 52
// baud = 48E6 / (8 * 52) = 115384.61538461539
// error of 0.001% (115384.61538461539 / 115200)
USART2->CR1 |= USART_CR1_OVER8_8;
USART2->BRR &= ~(USART_BRR_MANTISSA_MASK << USART_BRR_MANTISSA_BIT); USART2->BRR &= ~(USART_BRR_MANTISSA_MASK << USART_BRR_MANTISSA_BIT);
USART2->BRR |= (0x68 << USART_BRR_MANTISSA_BIT); USART2->BRR |= (0x34 << USART_BRR_MANTISSA_BIT);
/* USART2->BRR &= ~(USART_BRR_FRACTION_MASK << USART_BRR_FRACTION_BIT); */ USART2->BRR &= ~(USART_BRR_FRACTION_MASK << USART_BRR_FRACTION_BIT);
USART2->BRR |= (0x2AB << USART_BRR_FRACTION_BIT); USART2->BRR |= (0x0 << USART_BRR_FRACTION_BIT);
// Enable transmitter and receiver // Enable transmitter and receiver
USART2->CR1 |= USART_CR1_TE_ENABLE; USART2->CR1 |= USART_CR1_TE_ENABLE;
@@ -66,15 +62,10 @@ void usart2_start(void) {
USART2->CR1 |= USART_CR1_UE_ENABLE; USART2->CR1 |= USART_CR1_UE_ENABLE;
} }
void usart2_write_byte(uint8_t c) { void usart2_write_byte(char c) {
// Send data // Send data
USART2->DR = c; USART2->DR = c;
// Wait indefinitely for transmission to be ready for data // Wait indefinitely for transmission to be ready for data
/* while ((USART2->SR & USART_SR_TXE_TRANSMITTED) == 0); */ while ((USART2->SR & USART_SR_TXE_TRANSMITTED) == 0);
while (!(USART2->SR & USART_SR_TC_COMPLETED));
}
void usart2_write(char *buf) {
while (*buf) usart2_write_byte(*buf++);
} }
src/usart.h
+3 -9
View File
@@ -21,11 +21,6 @@ struct usart {
#define USART_SR_TXE_BIT 7 #define USART_SR_TXE_BIT 7
#define USART_SR_TXE_TRANSMITTED (1 << USART_SR_TXE_BIT) #define USART_SR_TXE_TRANSMITTED (1 << USART_SR_TXE_BIT)
// Transmission complete
#define USART_SR_TC_BIT 6
#define USART_SR_TC_COMPLETED (1 << USART_SR_TC_BIT)
// Read data register not empty // Read data register not empty
#define USART_SR_RXNE_BIT 5 #define USART_SR_RXNE_BIT 5
#define USART_SR_RXNE_READY (1 <<USART_SR_RXNE_BIT) #define USART_SR_RXNE_READY (1 <<USART_SR_RXNE_BIT)
@@ -49,15 +44,14 @@ struct usart {
// BRR Register // BRR Register
#define USART_BRR_MANTISSA_BIT 4 // Bits [15:4] #define USART_BRR_MANTISSA_BIT 4 // Bits [15:4]
#define USART_BRR_MANTISSA_MASK (0b111111111111) #define USART_BRR_MANTISSA_MASK (0b111111111111) // Bits [15:4]
#define USART_BRR_FRACTION_BIT 0 // Bits [3:0] #define USART_BRR_FRACTION_BIT 0 // Bits [3:0]
#define USART_BRR_FRACTION_MASK (0b111) #define USART_BRR_FRACTION_MASK (0b111) // Bits [3:0]
void usart2_init(void); void usart2_init(void);
void usart2_start(void); void usart2_start(void);
void usart2_write_byte(uint8_t byte); void usart2_write_byte(char byte);
void usart2_write(char *buf);
#endif #endif