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alex/stm32-falling-sand:main alex/stm32-falling-sand:uart
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compare: alex/stm32-falling-sand:2f4d38a0d8cb288e534d1835f9f5649d7c9ff3a1
Branches Tags
alex/stm32-falling-sand:main alex/stm32-falling-sand:uart

5 Commits
uart ... 2f4d38a0d8

Author SHA1 Message Date
Alexander Heldt 2f4d38a0d8 wip why does HSE run at 16MHz? 2024-12-28 15:03:49 +01:00
Alexander Heldt 4adddddd83 Fix check of PLL readiness 2024-12-28 15:02:35 +01:00
Alexander Heldt f492cb7fdb Set correct PLL M 2024-12-28 15:02:04 +01:00
Alexander Heldt 21df1010bf wip working usart and receive, but wrong baud rate. also 0kb flash reported; programmer broken? 2024-12-26 21:55:47 +01:00
Alexander Heldt 592717d900 wip working usart, not receiving over tty 2024-12-26 15:02:52 +01:00
27 changed files with 10820 additions and 1163 deletions
Expand all files Collapse all files
README.md
+35
View File
@@ -0,0 +1,35 @@
# Falling sand on the STM32F411CE
## Building
Run
```sh
make build
```
## Probe for the board
Run
```sh
st-info --probe
```
## Flashing
Run
```sh
make flash
```
## Debugging
### `st-info --probe` shows 0KB flash
```
> sudo st-info --probe
Found 1 stlink programmers
version: V2J43S28
serial: 0671FF343056363043090732
flash: 0 (pagesize: 16384) <--- 0KB flash
sram: 131072
chipid: 0x431
dev-type: STM32F411xC_xE
```
This can happen when the flash is locked. One way to unlock it is to erase the entire chip via the
Windows application `ST-Link Util`.
build/final.elf
BIN
View File
Binary file not shown.
build/final.elf.map
+216 -146
View File
@@ -36,6 +36,7 @@ Discarded input sections
.group 0x00000000 0xc build/main.o
.group 0x00000000 0xc build/main.o
.group 0x00000000 0xc build/main.o
.group 0x00000000 0xc build/main.o
.text 0x00000000 0x0 build/main.o
.data 0x00000000 0x0 build/main.o
.bss 0x00000000 0x0 build/main.o
@@ -52,7 +53,7 @@ Discarded input sections
.debug_macro 0x00000000 0x89 build/main.o
.debug_macro 0x00000000 0x4cc build/main.o
.debug_macro 0x00000000 0x22 build/main.o
.debug_macro 0x00000000 0x34 build/main.o
.debug_macro 0x00000000 0xa0 build/main.o
.group 0x00000000 0xc build/startup.o
.group 0x00000000 0xc build/startup.o
.group 0x00000000 0xc build/startup.o
@@ -96,6 +97,40 @@ Discarded input sections
.debug_macro 0x00000000 0x89 build/timer.o
.debug_macro 0x00000000 0x4cc build/timer.o
.debug_macro 0x00000000 0x22 build/timer.o
.group 0x00000000 0xc build/usart.o
.group 0x00000000 0xc build/usart.o
.group 0x00000000 0xc build/usart.o
.group 0x00000000 0xc build/usart.o
.group 0x00000000 0xc build/usart.o
.group 0x00000000 0xc build/usart.o
.group 0x00000000 0xc build/usart.o
.group 0x00000000 0xc build/usart.o
.group 0x00000000 0xc build/usart.o
.group 0x00000000 0xc build/usart.o
.group 0x00000000 0xc build/usart.o
.group 0x00000000 0xc build/usart.o
.group 0x00000000 0xc build/usart.o
.group 0x00000000 0xc build/usart.o
.group 0x00000000 0xc build/usart.o
.group 0x00000000 0xc build/usart.o
.text 0x00000000 0x0 build/usart.o
.data 0x00000000 0x0 build/usart.o
.bss 0x00000000 0x0 build/usart.o
.debug_macro 0x00000000 0x22 build/usart.o
.debug_macro 0x00000000 0x75 build/usart.o
.debug_macro 0x00000000 0x2a build/usart.o
.debug_macro 0x00000000 0x5c build/usart.o
.debug_macro 0x00000000 0x3c build/usart.o
.debug_macro 0x00000000 0x103 build/usart.o
.debug_macro 0x00000000 0x3a build/usart.o
.debug_macro 0x00000000 0x57 build/usart.o
.debug_macro 0x00000000 0x6a build/usart.o
.debug_macro 0x00000000 0x1df build/usart.o
.debug_macro 0x00000000 0x89 build/usart.o
.debug_macro 0x00000000 0x4cc build/usart.o
.debug_macro 0x00000000 0x191 build/usart.o
.debug_macro 0x00000000 0x22 build/usart.o
.debug_macro 0x00000000 0x82 build/usart.o
Memory Configuration
@@ -112,6 +147,7 @@ LOAD build/gpio.o
LOAD build/main.o
LOAD build/startup.o
LOAD build/timer.o
LOAD build/usart.o
0x20020000 stack_start = (ORIGIN (sram) + LENGTH (sram))
.isr_vector 0x08000000 0x198
@@ -121,7 +157,7 @@ LOAD build/timer.o
0x08000000 interrupt_vector_table
0x08000198 . = ALIGN (0x4)
.text 0x08000198 0x358
.text 0x08000198 0x4f8
0x08000198 . = ALIGN (0x4)
*(.text)
*(.text.*)
@@ -133,114 +169,129 @@ LOAD build/timer.o
0x080001fa gpio_write
*fill* 0x08000246 0x2
.text.system_clock_init
0x08000248 0x144 build/main.o
.text.main 0x0800038c 0x88 build/main.o
0x0800038c main
0x08000248 0x13c build/main.o
.text.main 0x08000384 0x9c build/main.o
0x08000384 main
.text.init_memory
0x08000414 0x64 build/startup.o
0x08000414 init_memory
.text.reset 0x08000478 0x10 build/startup.o
0x08000478 reset
0x08000420 0x64 build/startup.o
0x08000420 init_memory
.text.reset 0x08000484 0x10 build/startup.o
0x08000484 reset
.text.default_handler
0x08000488 0x8 build/startup.o
0x08000488 exti0
0x08000488 debug_monitor
0x08000488 rcc
0x08000488 x
0x08000488 sdio
0x08000488 usage_fault
0x08000488 tim1_up_tim10
0x08000488 usart1
0x08000488 i2c3_er
0x08000488 spi2
0x08000488 dma1_stream1
0x08000488 bus_fault
0x08000488 spi5
0x08000488 exti3
0x08000488 dma2_stream5
0x08000488 tim2
0x08000488 dma1_stream6
0x08000488 default_handler
0x08000488 i2c1_er
0x08000488 hard_fault
0x08000488 usart6
0x08000488 exti15_10
0x08000488 usart2
0x08000488 pend_sv
0x08000488 i2c1_ev
0x08000488 wwdg
0x08000488 adc
0x08000488 rtc_alarm
0x08000488 spi3
0x08000488 exti1
0x08000488 mem_manage
0x08000488 dma2_stream1
0x08000488 dma1_stream2
0x08000488 dma2_stream3
0x08000488 sv_call
0x08000488 tim3
0x08000488 otg_fs
0x08000488 dma1_stream5
0x08000488 dma2_stream6
0x08000488 flash
0x08000488 tamp_stamp
0x08000488 i2c3_ev
0x08000488 rtc_wkup
0x08000488 dma2_stream0
0x08000488 pvd
0x08000488 fpu
0x08000488 exti4
0x08000488 exti2
0x08000488 spi1
0x08000488 dma1_stream0
0x08000488 tim1_brk_tim9
0x08000488 i2c2_ev
0x08000488 otg_fs_wkup
0x08000488 spi4
0x08000488 dma2_stream2
0x08000488 tim1_cc
0x08000488 tim1_trg_com_tim11
0x08000488 exti9_5
0x08000488 dma1_stream3
0x08000488 dma2_stream4
0x08000488 i2c2_er
0x08000488 dma2_stream7
0x08000488 dma1_stream7
0x08000488 nmi
0x08000488 systick
0x08000488 tim4
0x08000488 tim5
0x08000488 dma1_stream4
0x08000494 0x8 build/startup.o
0x08000494 exti0
0x08000494 debug_monitor
0x08000494 rcc
0x08000494 x
0x08000494 sdio
0x08000494 usage_fault
0x08000494 tim1_up_tim10
0x08000494 usart1
0x08000494 i2c3_er
0x08000494 spi2
0x08000494 dma1_stream1
0x08000494 bus_fault
0x08000494 spi5
0x08000494 exti3
0x08000494 dma2_stream5
0x08000494 tim2
0x08000494 dma1_stream6
0x08000494 default_handler
0x08000494 i2c1_er
0x08000494 hard_fault
0x08000494 usart6
0x08000494 exti15_10
0x08000494 usart2
0x08000494 pend_sv
0x08000494 i2c1_ev
0x08000494 wwdg
0x08000494 adc
0x08000494 rtc_alarm
0x08000494 spi3
0x08000494 exti1
0x08000494 mem_manage
0x08000494 dma2_stream1
0x08000494 dma1_stream2
0x08000494 dma2_stream3
0x08000494 sv_call
0x08000494 tim3
0x08000494 otg_fs
0x08000494 dma1_stream5
0x08000494 dma2_stream6
0x08000494 flash
0x08000494 tamp_stamp
0x08000494 i2c3_ev
0x08000494 rtc_wkup
0x08000494 dma2_stream0
0x08000494 pvd
0x08000494 fpu
0x08000494 exti4
0x08000494 exti2
0x08000494 spi1
0x08000494 dma1_stream0
0x08000494 tim1_brk_tim9
0x08000494 i2c2_ev
0x08000494 otg_fs_wkup
0x08000494 spi4
0x08000494 dma2_stream2
0x08000494 tim1_cc
0x08000494 tim1_trg_com_tim11
0x08000494 exti9_5
0x08000494 dma1_stream3
0x08000494 dma2_stream4
0x08000494 i2c2_er
0x08000494 dma2_stream7
0x08000494 dma1_stream7
0x08000494 nmi
0x08000494 systick
0x08000494 tim4
0x08000494 tim5
0x08000494 dma1_stream4
.text.tim4_init
0x08000490 0x40 build/timer.o
0x08000490 tim4_init
0x0800049c 0x40 build/timer.o
0x0800049c tim4_init
.text.tim4_start
0x080004d0 0x20 build/timer.o
0x080004d0 tim4_start
0x080004dc 0x20 build/timer.o
0x080004dc tim4_start
.text.usart2_init
0x080004fc 0x114 build/usart.o
0x080004fc usart2_init
.text.usart2_start
0x08000610 0x20 build/usart.o
0x08000610 usart2_start
.text.usart2_write_byte
0x08000630 0x30 build/usart.o
0x08000630 usart2_write_byte
.text.usart2_write
0x08000660 0x2a build/usart.o
0x08000660 usart2_write
*(.rodata)
*fill* 0x0800068a 0x2
.rodata 0x0800068c 0x3 build/main.o
*(.rodata.*)
0x080004f0 . = ALIGN (0x4)
0x080004f0 _data_addr = LOADADDR (.data)
0x08000690 . = ALIGN (0x4)
*fill* 0x0800068f 0x1
0x08000690 _data_addr = LOADADDR (.data)
.glue_7 0x080004f0 0x0
.glue_7 0x080004f0 0x0 linker stubs
.glue_7 0x08000690 0x0
.glue_7 0x08000690 0x0 linker stubs
.glue_7t 0x080004f0 0x0
.glue_7t 0x080004f0 0x0 linker stubs
.glue_7t 0x08000690 0x0
.glue_7t 0x08000690 0x0 linker stubs
.vfp11_veneer 0x080004f0 0x0
.vfp11_veneer 0x080004f0 0x0 linker stubs
.vfp11_veneer 0x08000690 0x0
.vfp11_veneer 0x08000690 0x0 linker stubs
.v4_bx 0x080004f0 0x0
.v4_bx 0x080004f0 0x0 linker stubs
.v4_bx 0x08000690 0x0
.v4_bx 0x08000690 0x0 linker stubs
.iplt 0x080004f0 0x0
.iplt 0x080004f0 0x0 build/main.o
.iplt 0x08000690 0x0
.iplt 0x08000690 0x0 build/main.o
.rel.dyn 0x080004f0 0x0
.rel.iplt 0x080004f0 0x0 build/main.o
.rel.dyn 0x08000690 0x0
.rel.iplt 0x08000690 0x0 build/main.o
.data 0x20000000 0x0 load address 0x080004f0
.data 0x20000000 0x0 load address 0x08000690
0x20000000 . = ALIGN (0x4)
0x20000000 _data_start = .
*(.data)
@@ -248,10 +299,10 @@ LOAD build/timer.o
0x20000000 . = ALIGN (0x4)
0x20000000 _data_end = .
.igot.plt 0x20000000 0x0 load address 0x080004f0
.igot.plt 0x20000000 0x0 load address 0x08000690
.igot.plt 0x20000000 0x0 build/main.o
.bss 0x20000000 0x0 load address 0x080004f0
.bss 0x20000000 0x0 load address 0x08000690
0x20000000 . = ALIGN (0x4)
0x20000000 _bss_start = .
*(.bss)
@@ -261,19 +312,21 @@ LOAD build/timer.o
OUTPUT(build/final.elf elf32-littlearm)
LOAD linker stubs
.debug_info 0x00000000 0xb25
.debug_info 0x00000000 0x21a build/gpio.o
.debug_info 0x0000021a 0x44e build/main.o
.debug_info 0x00000668 0x188 build/startup.o
.debug_info 0x000007f0 0x335 build/timer.o
.debug_info 0x00000000 0xeb1
.debug_info 0x00000000 0x205 build/gpio.o
.debug_info 0x00000205 0x47e build/main.o
.debug_info 0x00000683 0x188 build/startup.o
.debug_info 0x0000080b 0x335 build/timer.o
.debug_info 0x00000b40 0x371 build/usart.o
.debug_abbrev 0x00000000 0x44b
.debug_abbrev 0x00000000 0x12b build/gpio.o
.debug_abbrev 0x0000012b 0x144 build/main.o
.debug_abbrev 0x0000026f 0x127 build/startup.o
.debug_abbrev 0x00000396 0xb5 build/timer.o
.debug_abbrev 0x00000000 0x547
.debug_abbrev 0x00000000 0x119 build/gpio.o
.debug_abbrev 0x00000119 0x14b build/main.o
.debug_abbrev 0x00000264 0x127 build/startup.o
.debug_abbrev 0x0000038b 0xb5 build/timer.o
.debug_abbrev 0x00000440 0x107 build/usart.o
.debug_aranges 0x00000000 0xa8
.debug_aranges 0x00000000 0xe0
.debug_aranges
0x00000000 0x28 build/gpio.o
.debug_aranges
@@ -282,9 +335,11 @@ LOAD linker stubs
0x00000050 0x30 build/startup.o
.debug_aranges
0x00000080 0x28 build/timer.o
.debug_aranges
0x000000a8 0x38 build/usart.o
.debug_rnglists
0x00000000 0x6c
0x00000000 0x92
.debug_rnglists
0x00000000 0x19 build/gpio.o
.debug_rnglists
@@ -293,8 +348,10 @@ LOAD linker stubs
0x00000034 0x1f build/startup.o
.debug_rnglists
0x00000053 0x19 build/timer.o
.debug_rnglists
0x0000006c 0x26 build/usart.o
.debug_macro 0x00000000 0x3ba0
.debug_macro 0x00000000 0x497f
.debug_macro 0x00000000 0xb56 build/gpio.o
.debug_macro 0x00000b56 0x22 build/gpio.o
.debug_macro 0x00000b78 0x75 build/gpio.o
@@ -309,33 +366,39 @@ LOAD linker stubs
.debug_macro 0x0000108c 0x89 build/gpio.o
.debug_macro 0x00001115 0x4cc build/gpio.o
.debug_macro 0x000015e1 0x22 build/gpio.o
.debug_macro 0x00001603 0x34 build/gpio.o
.debug_macro 0x00001637 0xb80 build/main.o
.debug_macro 0x000021b7 0x12a build/main.o
.debug_macro 0x000022e1 0x46 build/main.o
.debug_macro 0x00002327 0x2e build/main.o
.debug_macro 0x00002355 0x22 build/main.o
.debug_macro 0x00002377 0xb02 build/startup.o
.debug_macro 0x00002e79 0x56 build/startup.o
.debug_macro 0x00002ecf 0x51 build/startup.o
.debug_macro 0x00002f20 0xb5c build/timer.o
.debug_macro 0x00003a7c 0x124 build/timer.o
.debug_macro 0x00001603 0xa0 build/gpio.o
.debug_macro 0x000016a3 0xb89 build/main.o
.debug_macro 0x0000222c 0x197 build/main.o
.debug_macro 0x000023c3 0x46 build/main.o
.debug_macro 0x00002409 0x2e build/main.o
.debug_macro 0x00002437 0x22 build/main.o
.debug_macro 0x00002459 0x82 build/main.o
.debug_macro 0x000024db 0xb02 build/startup.o
.debug_macro 0x00002fdd 0x56 build/startup.o
.debug_macro 0x00003033 0x51 build/startup.o
.debug_macro 0x00003084 0xb5c build/timer.o
.debug_macro 0x00003be0 0x191 build/timer.o
.debug_macro 0x00003d71 0xb74 build/usart.o
.debug_macro 0x000048e5 0x9a build/usart.o
.debug_line 0x00000000 0x4b9
.debug_line 0x00000000 0x677
.debug_line 0x00000000 0x116 build/gpio.o
.debug_line 0x00000116 0x1da build/main.o
.debug_line 0x000002f0 0xea build/startup.o
.debug_line 0x000003da 0xdf build/timer.o
.debug_line 0x00000116 0x1e8 build/main.o
.debug_line 0x000002fe 0xea build/startup.o
.debug_line 0x000003e8 0xdf build/timer.o
.debug_line 0x000004c7 0x1b0 build/usart.o
.debug_str 0x00000000 0x5eb8
.debug_str 0x00000000 0x5372 build/gpio.o
0x551a (size before relaxing)
.debug_str 0x00005372 0xab2 build/main.o
0x5f7c (size before relaxing)
.debug_str 0x00005e24 0x88 build/startup.o
0x3cdf (size before relaxing)
.debug_str 0x00005eac 0xc build/timer.o
0x5b1a (size before relaxing)
.debug_str 0x00000000 0x658b
.debug_str 0x00000000 0x5574 build/gpio.o
0x571c (size before relaxing)
.debug_str 0x00005574 0xf50 build/main.o
0x661c (size before relaxing)
.debug_str 0x000064c4 0x88 build/startup.o
0x3cdc (size before relaxing)
.debug_str 0x0000654c 0xc build/timer.o
0x5cfb (size before relaxing)
.debug_str 0x00006558 0x33 build/usart.o
0x6291 (size before relaxing)
.comment 0x00000000 0x45
.comment 0x00000000 0x45 build/gpio.o
@@ -343,6 +406,7 @@ LOAD linker stubs
.comment 0x00000045 0x46 build/main.o
.comment 0x00000045 0x46 build/startup.o
.comment 0x00000045 0x46 build/timer.o
.comment 0x00000045 0x46 build/usart.o
.ARM.attributes
0x00000000 0x34
@@ -354,24 +418,30 @@ LOAD linker stubs
0x00000068 0x34 build/startup.o
.ARM.attributes
0x0000009c 0x34 build/timer.o
.ARM.attributes
0x000000d0 0x34 build/usart.o
.debug_line_str
0x00000000 0x283
0x00000000 0x290
.debug_line_str
0x00000000 0x24e build/gpio.o
0x260 (size before relaxing)
0x00000000 0x24b build/gpio.o
0x25d (size before relaxing)
.debug_line_str
0x0000024e 0x23 build/main.o
0x27c (size before relaxing)
0x0000024b 0x2b build/main.o
0x281 (size before relaxing)
.debug_line_str
0x00000271 0xa build/startup.o
0x21b (size before relaxing)
0x00000276 0xa build/startup.o
0x218 (size before relaxing)
.debug_line_str
0x0000027b 0x8 build/timer.o
0x25e (size before relaxing)
0x00000280 0x8 build/timer.o
0x25b (size before relaxing)
.debug_line_str
0x00000288 0x8 build/usart.o
0x26c (size before relaxing)
.debug_frame 0x00000000 0x16c
.debug_frame 0x00000000 0x208
.debug_frame 0x00000000 0x60 build/gpio.o
.debug_frame 0x00000060 0x50 build/main.o
.debug_frame 0x000000b0 0x6c build/startup.o
.debug_frame 0x0000011c 0x50 build/timer.o
.debug_frame 0x0000016c 0x9c build/usart.o
build/gpio.S
+218 -155
View File
@@ -182,16 +182,16 @@ gpio_write:
.file 4 "src/gpio.h"
.section .debug_info,"",%progbits
.Ldebug_info0:
.4byte 0x216
.4byte 0x201
.2byte 0x5
.byte 0x1
.byte 0x4
.4byte .Ldebug_abbrev0
.uleb128 0x9
.4byte .LASF894
.uleb128 0x8
.4byte .LASF912
.byte 0x1d
.4byte .LASF895
.4byte .LASF896
.4byte .LASF913
.4byte .LASF914
.4byte .LLRL0
.4byte 0
.4byte .Ldebug_line0
@@ -199,17 +199,17 @@ gpio_write:
.uleb128 0x1
.byte 0x1
.byte 0x6
.4byte .LASF863
.4byte .LASF881
.uleb128 0x1
.byte 0x1
.byte 0x8
.4byte .LASF864
.4byte .LASF882
.uleb128 0x1
.byte 0x2
.byte 0x5
.4byte .LASF865
.4byte .LASF883
.uleb128 0x3
.4byte .LASF868
.4byte .LASF886
.byte 0x2
.byte 0x39
.byte 0x1c
@@ -217,13 +217,13 @@ gpio_write:
.uleb128 0x1
.byte 0x2
.byte 0x7
.4byte .LASF866
.4byte .LASF884
.uleb128 0x1
.byte 0x4
.byte 0x5
.4byte .LASF867
.4byte .LASF885
.uleb128 0x3
.4byte .LASF869
.4byte .LASF887
.byte 0x2
.byte 0x4f
.byte 0x1b
@@ -231,21 +231,21 @@ gpio_write:
.uleb128 0x1
.byte 0x4
.byte 0x7
.4byte .LASF870
.4byte .LASF888
.uleb128 0x1
.byte 0x8
.byte 0x5
.4byte .LASF871
.4byte .LASF889
.uleb128 0x1
.byte 0x8
.byte 0x7
.4byte .LASF872
.uleb128 0xa
.4byte .LASF890
.uleb128 0x9
.byte 0x4
.byte 0x5
.ascii "int\000"
.uleb128 0x3
.4byte .LASF873
.4byte .LASF891
.byte 0x2
.byte 0xe8
.byte 0x16
@@ -253,123 +253,114 @@ gpio_write:
.uleb128 0x1
.byte 0x4
.byte 0x7
.4byte .LASF874
.4byte .LASF892
.uleb128 0x3
.4byte .LASF875
.4byte .LASF893
.byte 0x3
.byte 0x24
.byte 0x14
.4byte 0x3f
.uleb128 0x3
.4byte .LASF876
.4byte .LASF894
.byte 0x3
.byte 0x30
.byte 0x14
.4byte 0x59
.uleb128 0x6
.uleb128 0xa
.4byte 0xa0
.uleb128 0x3
.4byte .LASF877
.4byte .LASF895
.byte 0x3
.byte 0x52
.byte 0x15
.4byte 0x81
.uleb128 0xb
.4byte .LASF893
.byte 0x30
.4byte .LASF911
.byte 0x28
.byte 0x4
.byte 0x7
.byte 0x8
.4byte 0x139
.uleb128 0x2
.4byte .LASF878
.4byte .LASF896
.byte 0x8
.4byte 0xac
.byte 0
.uleb128 0x2
.4byte .LASF879
.4byte .LASF897
.byte 0x9
.4byte 0xac
.byte 0x4
.uleb128 0x2
.4byte .LASF880
.4byte .LASF898
.byte 0xa
.4byte 0xac
.byte 0x8
.uleb128 0x2
.4byte .LASF881
.4byte .LASF899
.byte 0xb
.4byte 0xac
.byte 0xc
.uleb128 0x7
.uleb128 0x6
.ascii "IDR\000"
.byte 0xc
.4byte 0xac
.byte 0x10
.uleb128 0x7
.uleb128 0x6
.ascii "ODR\000"
.byte 0xd
.4byte 0xac
.byte 0x14
.uleb128 0x2
.4byte .LASF882
.4byte .LASF900
.byte 0xe
.4byte 0xac
.byte 0x18
.uleb128 0x2
.4byte .LASF883
.4byte .LASF901
.byte 0xf
.4byte 0xac
.byte 0x1c
.uleb128 0x2
.4byte .LASF884
.4byte .LASF902
.byte 0x10
.4byte 0x149
.4byte 0xac
.byte 0x20
.uleb128 0x2
.4byte .LASF885
.4byte .LASF903
.byte 0x11
.4byte 0x149
.byte 0x28
.4byte 0xac
.byte 0x24
.byte 0
.uleb128 0xc
.4byte 0xac
.4byte 0x149
.uleb128 0xd
.4byte 0x8d
.byte 0x1
.byte 0
.uleb128 0x6
.4byte 0x139
.uleb128 0xe
.byte 0x7
.byte 0x1
.4byte 0x31
.byte 0x4
.byte 0x20
.byte 0x40
.byte 0xe
.4byte 0x175
.4byte 0x160
.uleb128 0x4
.4byte .LASF886
.4byte .LASF904
.byte 0
.uleb128 0x4
.4byte .LASF887
.4byte .LASF905
.byte 0x1
.uleb128 0x4
.4byte .LASF888
.4byte .LASF906
.byte 0x2
.uleb128 0x4
.4byte .LASF889
.4byte .LASF907
.byte 0x3
.byte 0
.uleb128 0x3
.4byte .LASF890
.4byte .LASF908
.byte 0x4
.byte 0x25
.byte 0x45
.byte 0x3
.4byte 0x14e
.uleb128 0xf
.4byte .LASF897
.4byte 0x139
.uleb128 0xd
.4byte .LASF915
.byte 0x1
.byte 0xd
.byte 0x6
@@ -377,7 +368,7 @@ gpio_write:
.4byte .LFE1-.LFB1
.uleb128 0x1
.byte 0x9c
.4byte 0x1c1
.4byte 0x1ac
.uleb128 0x5
.ascii "pin\000"
.byte 0xd
@@ -390,14 +381,14 @@ gpio_write:
.ascii "val\000"
.byte 0xd
.byte 0x23
.4byte 0x1c1
.4byte 0x1ac
.uleb128 0x2
.byte 0x91
.sleb128 -19
.uleb128 0x8
.4byte .LASF893
.uleb128 0x7
.4byte .LASF911
.byte 0xe
.4byte 0x1c8
.4byte 0x1b3
.uleb128 0x2
.byte 0x91
.sleb128 -12
@@ -405,12 +396,12 @@ gpio_write:
.uleb128 0x1
.byte 0x1
.byte 0x2
.4byte .LASF891
.uleb128 0x10
.4byte .LASF909
.uleb128 0xe
.byte 0x4
.4byte 0xbd
.uleb128 0x11
.4byte .LASF898
.uleb128 0xf
.4byte .LASF916
.byte 0x1
.byte 0x6
.byte 0x6
@@ -426,23 +417,23 @@ gpio_write:
.uleb128 0x2
.byte 0x91
.sleb128 -18
.uleb128 0x12
.4byte .LASF892
.uleb128 0x10
.4byte .LASF910
.byte 0x1
.byte 0x6
.byte 0x2c
.4byte 0x175
.4byte 0x160
.uleb128 0x2
.byte 0x91
.sleb128 -19
.uleb128 0x8
.4byte .LASF893
.uleb128 0x7
.4byte .LASF911
.byte 0x7
.4byte 0x1c8
.4byte 0x1b3
.uleb128 0x2
.byte 0x91
.sleb128 -12
.uleb128 0x13
.uleb128 0x11
.ascii "pn\000"
.byte 0x1
.byte 0x8
@@ -528,13 +519,6 @@ gpio_write:
.byte 0
.byte 0
.uleb128 0x6
.uleb128 0x35
.byte 0
.uleb128 0x49
.uleb128 0x13
.byte 0
.byte 0
.uleb128 0x7
.uleb128 0xd
.byte 0
.uleb128 0x3
@@ -553,7 +537,7 @@ gpio_write:
.uleb128 0xb
.byte 0
.byte 0
.uleb128 0x8
.uleb128 0x7
.uleb128 0x34
.byte 0
.uleb128 0x3
@@ -572,7 +556,7 @@ gpio_write:
.uleb128 0x18
.byte 0
.byte 0
.uleb128 0x9
.uleb128 0x8
.uleb128 0x11
.byte 0x1
.uleb128 0x25
@@ -593,7 +577,7 @@ gpio_write:
.uleb128 0x17
.byte 0
.byte 0
.uleb128 0xa
.uleb128 0x9
.uleb128 0x24
.byte 0
.uleb128 0xb
@@ -604,6 +588,13 @@ gpio_write:
.uleb128 0x8
.byte 0
.byte 0
.uleb128 0xa
.uleb128 0x35
.byte 0
.uleb128 0x49
.uleb128 0x13
.byte 0
.byte 0
.uleb128 0xb
.uleb128 0x13
.byte 0x1
@@ -622,24 +613,6 @@ gpio_write:
.byte 0
.byte 0
.uleb128 0xc
.uleb128 0x1
.byte 0x1
.uleb128 0x49
.uleb128 0x13
.uleb128 0x1
.uleb128 0x13
.byte 0
.byte 0
.uleb128 0xd
.uleb128 0x21
.byte 0
.uleb128 0x49
.uleb128 0x13
.uleb128 0x2f
.uleb128 0xb
.byte 0
.byte 0
.uleb128 0xe
.uleb128 0x4
.byte 0x1
.uleb128 0x3e
@@ -658,7 +631,7 @@ gpio_write:
.uleb128 0x13
.byte 0
.byte 0
.uleb128 0xf
.uleb128 0xd
.uleb128 0x2e
.byte 0x1
.uleb128 0x3f
@@ -685,7 +658,7 @@ gpio_write:
.uleb128 0x13
.byte 0
.byte 0
.uleb128 0x10
.uleb128 0xe
.uleb128 0xf
.byte 0
.uleb128 0xb
@@ -694,7 +667,7 @@ gpio_write:
.uleb128 0x13
.byte 0
.byte 0
.uleb128 0x11
.uleb128 0xf
.uleb128 0x2e
.byte 0x1
.uleb128 0x3f
@@ -719,7 +692,7 @@ gpio_write:
.uleb128 0x19
.byte 0
.byte 0
.uleb128 0x12
.uleb128 0x10
.uleb128 0x5
.byte 0
.uleb128 0x3
@@ -736,7 +709,7 @@ gpio_write:
.uleb128 0x18
.byte 0
.byte 0
.uleb128 0x13
.uleb128 0x11
.uleb128 0x34
.byte 0
.uleb128 0x3
@@ -3552,7 +3525,7 @@ gpio_write:
.uleb128 0x32
.4byte .LASF854
.byte 0
.section .debug_macro,"G",%progbits,wm4.gpio.h.2.d78c96d470f4347bf35ed0e3d72ef81e,comdat
.section .debug_macro,"G",%progbits,wm4.gpio.h.2.bc74b8bd59193b3190f972f5d232b4bf,comdat
.Ldebug_macro15:
.2byte 0x5
.byte 0
@@ -3566,20 +3539,74 @@ gpio_write:
.uleb128 0x15
.4byte .LASF857
.byte 0x5
.uleb128 0x16
.uleb128 0x18
.4byte .LASF858
.byte 0x5
.uleb128 0x18
.uleb128 0x1a
.4byte .LASF859
.byte 0x5
.uleb128 0x1a
.uleb128 0x1b
.4byte .LASF860
.byte 0x5
.uleb128 0x1c
.uleb128 0x1d
.4byte .LASF861
.byte 0x5
.uleb128 0x1e
.4byte .LASF862
.byte 0x5
.uleb128 0x20
.4byte .LASF863
.byte 0x5
.uleb128 0x21
.4byte .LASF864
.byte 0x5
.uleb128 0x24
.4byte .LASF865
.byte 0x5
.uleb128 0x25
.4byte .LASF866
.byte 0x5
.uleb128 0x26
.4byte .LASF867
.byte 0x5
.uleb128 0x29
.4byte .LASF868
.byte 0x5
.uleb128 0x2a
.4byte .LASF869
.byte 0x5
.uleb128 0x2b
.4byte .LASF870
.byte 0x5
.uleb128 0x2d
.4byte .LASF871
.byte 0x5
.uleb128 0x2e
.4byte .LASF872
.byte 0x5
.uleb128 0x2f
.4byte .LASF873
.byte 0x5
.uleb128 0x34
.4byte .LASF874
.byte 0x5
.uleb128 0x35
.4byte .LASF875
.byte 0x5
.uleb128 0x36
.4byte .LASF876
.byte 0x5
.uleb128 0x38
.4byte .LASF877
.byte 0x5
.uleb128 0x3a
.4byte .LASF878
.byte 0x5
.uleb128 0x3c
.4byte .LASF879
.byte 0x5
.uleb128 0x3e
.4byte .LASF880
.byte 0
.section .debug_line,"",%progbits
.Ldebug_line0:
@@ -3624,7 +3651,7 @@ gpio_write:
.ascii "__PTRDIFF_MAX__ 0x7fffffff\000"
.LASF541:
.ascii "_LONG_DOUBLE long double\000"
.LASF893:
.LASF911:
.ascii "gpio\000"
.LASF591:
.ascii "INT_LEAST8_MIN (-__INT_LEAST8_MAX__ - 1)\000"
@@ -3632,7 +3659,7 @@ gpio_write:
.ascii "_UINT32_T_DECLARED \000"
.LASF90:
.ascii "__INTMAX_MAX__ 0x7fffffffffffffffLL\000"
.LASF888:
.LASF906:
.ascii "GPIO_MODE_AF\000"
.LASF335:
.ascii "__TQ_IBIT__ 0\000"
@@ -3704,6 +3731,8 @@ gpio_write:
.ascii "INT_LEAST16_MAX (__INT_LEAST16_MAX__)\000"
.LASF703:
.ascii "SCNiFAST8 __SCN8FAST(i)\000"
.LASF856:
.ascii "GPIOA_BASE_ADDR (0x40020000U)\000"
.LASF120:
.ascii "__UINT_LEAST16_MAX__ 0xffff\000"
.LASF616:
@@ -3746,11 +3775,15 @@ gpio_write:
.ascii "__need_wchar_t\000"
.LASF199:
.ascii "__FLT32_MIN_EXP__ (-125)\000"
.LASF894:
.LASF912:
.ascii "GNU C2X 12.3.1 20230626 -mcpu=cortex-m4 -mthumb -mf"
.ascii "loat-abi=hard -mfpu=fpv4-sp-d16 -march=armv7e-m+fp "
.ascii "-g3 -ggdb -O0 -std=c2x -ffunction-sections -fdata-s"
.ascii "ections -fno-builtin -fno-common\000"
.LASF865:
.ascii "GPIO_AFRH_AFRH8_BIT 0\000"
.LASF868:
.ascii "GPIO_AFRL_AFRL3_BIT 12\000"
.LASF595:
.ascii "INT16_MAX (__INT16_MAX__)\000"
.LASF502:
@@ -3831,7 +3864,7 @@ gpio_write:
.ascii "__INT64 \"ll\"\000"
.LASF138:
.ascii "__INTPTR_MAX__ 0x7fffffff\000"
.LASF858:
.LASF876:
.ascii "GPIO(port) ((struct gpio*)(uintptr_t)(GPIO_BASE_ADD"
.ascii "R + (GPIO_PORT_OFFSET * port)))\000"
.LASF499:
@@ -3867,7 +3900,7 @@ gpio_write:
.ascii "PRId64 __PRI64(d)\000"
.LASF302:
.ascii "__UACCUM_IBIT__ 16\000"
.LASF867:
.LASF885:
.ascii "long int\000"
.LASF818:
.ascii "PRIXFAST64 __PRI64FAST(X)\000"
@@ -3895,6 +3928,8 @@ gpio_write:
.ascii "PRIdFAST32 __PRI32FAST(d)\000"
.LASF93:
.ascii "__UINTMAX_C(c) c ## ULL\000"
.LASF866:
.ascii "GPIO_AFRH_AFRH8_MASK (0b1111)\000"
.LASF31:
.ascii "__SIZEOF_POINTER__ 4\000"
.LASF621:
@@ -3963,7 +3998,7 @@ gpio_write:
.ascii "PRIoLEAST16 __PRI16LEAST(o)\000"
.LASF458:
.ascii "__NEWLIB__ 4\000"
.LASF886:
.LASF904:
.ascii "GPIO_MODE_INPUT\000"
.LASF720:
.ascii "SCNi16 __SCN16(i)\000"
@@ -3973,7 +4008,7 @@ gpio_write:
.ascii "__FLT_DECIMAL_DIG__ 9\000"
.LASF562:
.ascii "_UINT8_T_DECLARED \000"
.LASF863:
.LASF881:
.ascii "signed char\000"
.LASF805:
.ascii "PRIuLEAST64 __PRI64LEAST(u)\000"
@@ -3985,7 +4020,7 @@ gpio_write:
.ascii "__ARM_FEATURE_FMA 1\000"
.LASF364:
.ascii "__GNUC_STDC_INLINE__ 1\000"
.LASF890:
.LASF908:
.ascii "GPIO_MODE\000"
.LASF256:
.ascii "__FRACT_FBIT__ 15\000"
@@ -4007,9 +4042,11 @@ gpio_write:
.ascii "__SACCUM_MAX__ 0X7FFFP-7HK\000"
.LASF219:
.ascii "__FLT64_MAX_10_EXP__ 308\000"
.LASF872:
.ascii "GPIO_AFRL_AFRL2_MASK (0b1111)\000"
.LASF65:
.ascii "__UINT_FAST32_TYPE__ unsigned int\000"
.LASF864:
.LASF882:
.ascii "unsigned char\000"
.LASF3:
.ascii "__STDC_UTF_32__ 1\000"
@@ -4057,13 +4094,13 @@ gpio_write:
.ascii "__int_fast64_t_defined 1\000"
.LASF837:
.ascii "__PRIPTR(x) __STRINGIFY(x)\000"
.LASF875:
.LASF893:
.ascii "uint16_t\000"
.LASF417:
.ascii "__thumb2__ 1\000"
.LASF321:
.ascii "__ULLACCUM_FBIT__ 32\000"
.LASF891:
.LASF909:
.ascii "_Bool\000"
.LASF366:
.ascii "__STRICT_ANSI__ 1\000"
@@ -4081,7 +4118,7 @@ gpio_write:
.ascii "__PRAGMA_REDEFINE_EXTNAME 1\000"
.LASF36:
.ascii "__WCHAR_TYPE__ unsigned int\000"
.LASF887:
.LASF905:
.ascii "GPIO_MODE_OUTPUT\000"
.LASF357:
.ascii "__USA_IBIT__ 16\000"
@@ -4119,7 +4156,7 @@ gpio_write:
.ascii "__SCN64(x) __INT64 __STRINGIFY(x)\000"
.LASF646:
.ascii "_GCC_WRAP_STDINT_H \000"
.LASF868:
.LASF886:
.ascii "__uint16_t\000"
.LASF224:
.ascii "__FLT64_EPSILON__ 2.2204460492503131e-16F64\000"
@@ -4147,7 +4184,7 @@ gpio_write:
.ascii "INTMAX_MAX (__INTMAX_MAX__)\000"
.LASF601:
.ascii "INT32_MAX (__INT32_MAX__)\000"
.LASF859:
.LASF877:
.ascii "BIT(x) (1 << x)\000"
.LASF469:
.ascii "_MB_LEN_MAX 8\000"
@@ -4165,6 +4202,8 @@ gpio_write:
.ascii "_END_STD_C \000"
.LASF852:
.ascii "true ((_Bool)+1u)\000"
.LASF869:
.ascii "GPIO_AFRL_AFRL3_MASK (0b1111)\000"
.LASF599:
.ascii "UINT_LEAST16_MAX (__UINT_LEAST16_MAX__)\000"
.LASF123:
@@ -4177,7 +4216,7 @@ gpio_write:
.ascii "__FLT_EPSILON__ 1.1920928955078125e-7F\000"
.LASF376:
.ascii "__GCC_ATOMIC_SHORT_LOCK_FREE 2\000"
.LASF860:
.LASF878:
.ascii "PIN(port,num) ((((port) - 'A') << 8) | num)\000"
.LASF806:
.ascii "PRIxLEAST64 __PRI64LEAST(x)\000"
@@ -4243,6 +4282,8 @@ gpio_write:
.ascii "__FP_FAST_FMAF 1\000"
.LASF628:
.ascii "SIG_ATOMIC_MIN (-__STDINT_EXP(INT_MAX) - 1)\000"
.LASF873:
.ascii "GPIO_AFRL_AFRL2_USART2_TX (0b0111)\000"
.LASF564:
.ascii "_INT16_T_DECLARED \000"
.LASF245:
@@ -4265,6 +4306,8 @@ gpio_write:
.ascii "__ARM_FEATURE_FP16_FML\000"
.LASF802:
.ascii "PRIdLEAST64 __PRI64LEAST(d)\000"
.LASF858:
.ascii "GPIO_MODER_AF_MODE (0b10)\000"
.LASF255:
.ascii "__USFRACT_EPSILON__ 0x1P-8UHR\000"
.LASF762:
@@ -4285,6 +4328,8 @@ gpio_write:
.ascii "INT64_C(x) __INT64_C(x)\000"
.LASF615:
.ascii "INT_FAST16_MIN (-__INT_FAST16_MAX__ - 1)\000"
.LASF864:
.ascii "GPIO_MODER_MODER2_MASK (0b11)\000"
.LASF106:
.ascii "__INT_LEAST8_MAX__ 0x7f\000"
.LASF383:
@@ -4311,6 +4356,8 @@ gpio_write:
.ascii "__PRI8LEAST(x) __LEAST8 __STRINGIFY(x)\000"
.LASF174:
.ascii "__DBL_EPSILON__ ((double)2.2204460492503131e-16L)\000"
.LASF860:
.ascii "GPIO_MODER_MODER8_MASK (0b11)\000"
.LASF268:
.ascii "__LFRACT_MIN__ (-0.5LR-0.5LR)\000"
.LASF117:
@@ -4333,7 +4380,7 @@ gpio_write:
.ascii "___int8_t_defined 1\000"
.LASF248:
.ascii "__SFRACT_MIN__ (-0.5HR-0.5HR)\000"
.LASF870:
.LASF888:
.ascii "long unsigned int\000"
.LASF349:
.ascii "__SA_IBIT__ 16\000"
@@ -4349,7 +4396,7 @@ gpio_write:
.ascii "__ARM_FP16_FORMAT_IEEE\000"
.LASF48:
.ascii "__UINT16_TYPE__ short unsigned int\000"
.LASF897:
.LASF915:
.ascii "gpio_write\000"
.LASF569:
.ascii "__int32_t_defined 1\000"
@@ -4361,8 +4408,6 @@ gpio_write:
.ascii "__FLT_EVAL_METHOD_TS_18661_3__ 0\000"
.LASF521:
.ascii "int +2\000"
.LASF896:
.ascii "/home/alex/code/own/c-compile-experiments\000"
.LASF636:
.ascii "INT8_C(x) __INT8_C(x)\000"
.LASF63:
@@ -4395,7 +4440,7 @@ gpio_write:
.ascii "SCNx8 __SCN8(x)\000"
.LASF208:
.ascii "__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32\000"
.LASF898:
.LASF916:
.ascii "gpio_set_mode\000"
.LASF125:
.ascii "__UINT64_C(c) c ## ULL\000"
@@ -4407,6 +4452,8 @@ gpio_write:
.ascii "__USFRACT_FBIT__ 8\000"
.LASF191:
.ascii "__LDBL_EPSILON__ 2.2204460492503131e-16L\000"
.LASF857:
.ascii "GPIOA ((struct gpio *) GPIOA_BASE_ADDR)\000"
.LASF729:
.ascii "PRIXLEAST16 __PRI16LEAST(X)\000"
.LASF622:
@@ -4415,7 +4462,7 @@ gpio_write:
.ascii "__GCC_ATOMIC_CHAR16_T_LOCK_FREE 2\000"
.LASF789:
.ascii "__PRI64FAST(x) __FAST64 __STRINGIFY(x)\000"
.LASF877:
.LASF895:
.ascii "uintptr_t\000"
.LASF168:
.ascii "__DBL_MAX_EXP__ 1024\000"
@@ -4463,7 +4510,7 @@ gpio_write:
.ascii "PRIX32 __PRI32(X)\000"
.LASF773:
.ascii "SCNxLEAST32 __SCN32LEAST(x)\000"
.LASF880:
.LASF898:
.ascii "OSPEEDR\000"
.LASF711:
.ascii "__SCN16LEAST(x) __LEAST16 __STRINGIFY(x)\000"
@@ -4493,7 +4540,7 @@ gpio_write:
.ascii "__ULACCUM_MIN__ 0.0ULK\000"
.LASF461:
.ascii "_ATEXIT_DYNAMIC_ALLOC 1\000"
.LASF869:
.LASF887:
.ascii "__uint32_t\000"
.LASF188:
.ascii "__LDBL_MAX__ 1.7976931348623157e+308L\000"
@@ -4503,7 +4550,7 @@ gpio_write:
.ascii "__FLT_RADIX__ 2\000"
.LASF454:
.ascii "_INTTYPES_H \000"
.LASF871:
.LASF889:
.ascii "long long int\000"
.LASF401:
.ascii "__ARM_FEATURE_CMSE\000"
@@ -4539,6 +4586,8 @@ gpio_write:
.ascii "__WCHAR_T \000"
.LASF223:
.ascii "__FLT64_MIN__ 2.2250738585072014e-308F64\000"
.LASF870:
.ascii "GPIO_AFRL_AFRL3_USART2_RX (0b0111)\000"
.LASF553:
.ascii "___int32_t_defined 1\000"
.LASF83:
@@ -4608,20 +4657,22 @@ gpio_write:
.ascii "\000"
.LASF582:
.ascii "__int_fast16_t_defined 1\000"
.LASF878:
.LASF896:
.ascii "MODER\000"
.LASF482:
.ascii "__FLOAT_TYPE float\000"
.LASF185:
.ascii "__LDBL_MAX_10_EXP__ 308\000"
.LASF867:
.ascii "GPIO_AFRH_AFRH8_MCO_1 (0b0000)\000"
.LASF175:
.ascii "__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324"
.ascii "L)\000"
.LASF607:
.ascii "INT64_MAX (__INT64_MAX__)\000"
.LASF874:
.LASF892:
.ascii "unsigned int\000"
.LASF873:
.LASF891:
.ascii "__uintptr_t\000"
.LASF459:
.ascii "__NEWLIB_MINOR__ 3\000"
@@ -4653,7 +4704,7 @@ gpio_write:
.ascii "__CHAR_BIT__ 8\000"
.LASF143:
.ascii "__FLT_EVAL_METHOD__ 0\000"
.LASF865:
.LASF883:
.ascii "short int\000"
.LASF685:
.ascii "PRIdLEAST8 __PRI8LEAST(d)\000"
@@ -4713,6 +4764,8 @@ gpio_write:
.ascii "__ATFILE_VISIBLE 0\000"
.LASF372:
.ascii "__GCC_ATOMIC_CHAR_LOCK_FREE 2\000"
.LASF859:
.ascii "GPIO_MODER_MODER8_BIT 16\000"
.LASF270:
.ascii "__LFRACT_EPSILON__ 0x1P-31LR\000"
.LASF808:
@@ -4779,6 +4832,8 @@ gpio_write:
.ascii "__UFRACT_IBIT__ 0\000"
.LASF399:
.ascii "__ARM_32BIT_STATE 1\000"
.LASF863:
.ascii "GPIO_MODER_MODER2_BIT 4\000"
.LASF107:
.ascii "__INT8_C(c) c\000"
.LASF267:
@@ -4791,12 +4846,14 @@ gpio_write:
.ascii "SCNuFAST16 __SCN16FAST(u)\000"
.LASF801:
.ascii "SCNx64 __SCN64(x)\000"
.LASF862:
.LASF880:
.ascii "PINPORT(pin) (pin >> 8)\000"
.LASF198:
.ascii "__FLT32_DIG__ 6\000"
.LASF645:
.ascii "UINTMAX_C(x) __UINTMAX_C(x)\000"
.LASF862:
.ascii "GPIO_MODER_MODER3_MASK (0b11)\000"
.LASF623:
.ascii "UINT_FAST64_MAX (__UINT_FAST64_MAX__)\000"
.LASF515:
@@ -4839,7 +4896,7 @@ gpio_write:
.ascii "__ORDER_LITTLE_ENDIAN__ 1234\000"
.LASF155:
.ascii "__FLT_NORM_MAX__ 3.4028234663852886e+38F\000"
.LASF872:
.LASF890:
.ascii "long long unsigned int\000"
.LASF611:
.ascii "UINT_LEAST64_MAX (__UINT_LEAST64_MAX__)\000"
@@ -4869,6 +4926,8 @@ gpio_write:
.ascii "SCNdFAST32 __SCN32FAST(d)\000"
.LASF339:
.ascii "__UHQ_IBIT__ 0\000"
.LASF861:
.ascii "GPIO_MODER_MODER3_BIT 6\000"
.LASF60:
.ascii "__INT_FAST16_TYPE__ int\000"
.LASF631:
@@ -4917,11 +4976,11 @@ gpio_write:
.ascii "SCNdFAST8 __SCN8FAST(d)\000"
.LASF576:
.ascii "_UINTPTR_T_DECLARED \000"
.LASF885:
.LASF903:
.ascii "AFRH\000"
.LASF314:
.ascii "__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULK\000"
.LASF884:
.LASF902:
.ascii "AFRL\000"
.LASF273:
.ascii "__ULFRACT_MIN__ 0.0ULR\000"
@@ -4935,7 +4994,7 @@ gpio_write:
.ascii "__INT32_TYPE__ long int\000"
.LASF118:
.ascii "__UINT_LEAST8_MAX__ 0xff\000"
.LASF883:
.LASF901:
.ascii "LCKR\000"
.LASF520:
.ascii "__int20__ +2\000"
@@ -4981,7 +5040,7 @@ gpio_write:
.ascii "__QQ_IBIT__ 0\000"
.LASF763:
.ascii "PRIdLEAST32 __PRI32LEAST(d)\000"
.LASF879:
.LASF897:
.ascii "OTYPER\000"
.LASF811:
.ascii "SCNuLEAST64 __SCN64LEAST(u)\000"
@@ -5001,11 +5060,11 @@ gpio_write:
.ascii "__GNUC_MINOR__ 3\000"
.LASF57:
.ascii "__UINT_LEAST32_TYPE__ long unsigned int\000"
.LASF895:
.LASF913:
.ascii "src/gpio.c\000"
.LASF405:
.ascii "__ARM_FEATURE_NUMERIC_MAXMIN\000"
.LASF856:
.LASF874:
.ascii "GPIO_BASE_ADDR (0x40020000U)\000"
.LASF38:
.ascii "__INTMAX_TYPE__ long long int\000"
@@ -5057,7 +5116,7 @@ gpio_write:
.ascii "__SCN8(x) __INT8 __STRINGIFY(x)\000"
.LASF23:
.ascii "__SIZEOF_SIZE_T__ 4\000"
.LASF857:
.LASF875:
.ascii "GPIO_PORT_OFFSET (0x400U)\000"
.LASF50:
.ascii "__UINT64_TYPE__ long long unsigned int\000"
@@ -5067,6 +5126,8 @@ gpio_write:
.ascii "__INT64_C(c) c ## LL\000"
.LASF699:
.ascii "PRIuFAST8 __PRI8FAST(u)\000"
.LASF871:
.ascii "GPIO_AFRL_AFRL2_BIT 8\000"
.LASF190:
.ascii "__LDBL_MIN__ 2.2250738585072014e-308L\000"
.LASF445:
@@ -5075,7 +5136,7 @@ gpio_write:
.ascii "__ACCUM_IBIT__ 16\000"
.LASF509:
.ascii "unsigned\000"
.LASF881:
.LASF899:
.ascii "PUPDR\000"
.LASF835:
.ascii "SCNuMAX __SCNMAX(u)\000"
@@ -5085,7 +5146,7 @@ gpio_write:
.ascii "_ATTRIBUTE(attrs) __attribute__ (attrs)\000"
.LASF359:
.ascii "__UDA_IBIT__ 32\000"
.LASF892:
.LASF910:
.ascii "mode\000"
.LASF586:
.ascii "INTPTR_MAX (__INTPTR_MAX__)\000"
@@ -5099,7 +5160,7 @@ gpio_write:
.ascii "__UHQ_FBIT__ 16\000"
.LASF443:
.ascii "__ARM_FEATURE_COPROC\000"
.LASF889:
.LASF907:
.ascii "GPIO_MODE_ANALOG\000"
.LASF177:
.ascii "__DBL_HAS_INFINITY__ 1\000"
@@ -5137,7 +5198,7 @@ gpio_write:
.ascii "__FAST8 \000"
.LASF496:
.ascii "__XSI_VISIBLE 0\000"
.LASF882:
.LASF900:
.ascii "BSRR\000"
.LASF794:
.ascii "PRIu64 __PRI64(u)\000"
@@ -5225,7 +5286,7 @@ gpio_write:
.ascii "PRIx32 __PRI32(x)\000"
.LASF278:
.ascii "__LLFRACT_MIN__ (-0.5LLR-0.5LLR)\000"
.LASF876:
.LASF894:
.ascii "uint32_t\000"
.LASF689:
.ascii "PRIxLEAST8 __PRI8LEAST(x)\000"
@@ -5273,13 +5334,13 @@ gpio_write:
.ascii "__INT_LEAST16_TYPE__ short int\000"
.LASF326:
.ascii "__QQ_FBIT__ 7\000"
.LASF861:
.LASF879:
.ascii "PINNUM(pin) (pin & 0b1111)\000"
.LASF768:
.ascii "PRIXLEAST32 __PRI32LEAST(X)\000"
.LASF171:
.ascii "__DBL_MAX__ ((double)1.7976931348623157e+308L)\000"
.LASF866:
.LASF884:
.ascii "short unsigned int\000"
.LASF276:
.ascii "__LLFRACT_FBIT__ 63\000"
@@ -5327,6 +5388,8 @@ gpio_write:
.ascii "__SCN64LEAST(x) __LEAST64 __STRINGIFY(x)\000"
.LASF280:
.ascii "__LLFRACT_EPSILON__ 0x1P-63LLR\000"
.LASF914:
.ascii "/home/alex/code/own/stm32-falling-sand\000"
.LASF249:
.ascii "__SFRACT_MAX__ 0X7FP-7HR\000"
.LASF230:
build/gpio.i
+37 -5
View File
@@ -1,5 +1,5 @@
# 0 "src/gpio.c"
# 1 "/home/alex/code/own/c-compile-experiments//"
# 1 "/home/alex/code/own/stm32-falling-sand//"
# 0 "<built-in>"
#define __STDC__ 1
# 0 "<built-in>"
@@ -1995,10 +1995,42 @@ struct gpio {
volatile uint32_t ODR;
volatile uint32_t BSRR;
volatile uint32_t LCKR;
volatile uint32_t AFRL[2];
volatile uint32_t AFRH[2];
volatile uint32_t AFRL;
volatile uint32_t AFRH;
};
#define GPIOA_BASE_ADDR (0x40020000U)
#define GPIOA ((struct gpio *) GPIOA_BASE_ADDR)
#define GPIO_MODER_AF_MODE (0b10)
#define GPIO_MODER_MODER8_BIT 16
#define GPIO_MODER_MODER8_MASK (0b11)
#define GPIO_MODER_MODER3_BIT 6
#define GPIO_MODER_MODER3_MASK (0b11)
#define GPIO_MODER_MODER2_BIT 4
#define GPIO_MODER_MODER2_MASK (0b11)
#define GPIO_AFRH_AFRH8_BIT 0
#define GPIO_AFRH_AFRH8_MASK (0b1111)
#define GPIO_AFRH_AFRH8_MCO_1 (0b0000)
#define GPIO_AFRL_AFRL3_BIT 12
#define GPIO_AFRL_AFRL3_MASK (0b1111)
#define GPIO_AFRL_AFRL3_USART2_RX (0b0111)
#define GPIO_AFRL_AFRL2_BIT 8
#define GPIO_AFRL_AFRL2_MASK (0b1111)
#define GPIO_AFRL_AFRL2_USART2_TX (0b0111)
#define GPIO_BASE_ADDR (0x40020000U)
#define GPIO_PORT_OFFSET (0x400U)
#define GPIO(port) ((struct gpio*)(uintptr_t)(GPIO_BASE_ADDR + (GPIO_PORT_OFFSET * port)))
@@ -2020,9 +2052,9 @@ typedef enum {
void gpio_set_mode(uint16_t pin, GPIO_MODE mode);
void gpio_write(uint16_t pin,
# 40 "src/gpio.h" 3 4
# 72 "src/gpio.h" 3 4
_Bool
# 40 "src/gpio.h"
# 72 "src/gpio.h"
val);
# 5 "src/gpio.c" 2
build/gpio.o
BIN
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Binary file not shown.
build/main.S
+906 -568
View File
File diff suppressed because it is too large Load Diff
build/main.i
+159 -22
View File
@@ -1,5 +1,5 @@
# 0 "src/main.c"
# 1 "/home/alex/code/own/c-compile-experiments//"
# 1 "/home/alex/code/own/stm32-falling-sand//"
# 0 "<built-in>"
#define __STDC__ 1
# 0 "<built-in>"
@@ -2029,6 +2029,11 @@ struct rcc {
#define RCC_CR_PLLON_ON (1 << RCC_CR_PLLON_BIT)
#define RCC_CR_CSS_BIT 19
#define RCC_CR_CSS_ON (1 << RCC_CR_CSS_BIT)
#define RCC_CR_HSERDY_BIT 17
#define RCC_CR_HSERDY_READY (1 << RCC_CR_HSERDY_BIT)
@@ -2051,6 +2056,7 @@ struct rcc {
#define RCC_PLLCFGR_PLLSRC_BIT 22
#define RCC_PLLCFGR_PLLSRC_HSE (1 << RCC_PLLCFGR_PLLSRC_BIT)
#define RCC_PLLCFGR_PLLSRC_HSI (0 << RCC_PLLCFGR_PLLSRC_BIT)
#define RCC_PLLCFGR_PLLP_BIT 16
#define RCC_PLLCFGR_PLLP_MASK (0b11)
@@ -2070,6 +2076,19 @@ struct rcc {
#define RCC_CFGR_PPRE_DIV_2 (0b100)
#define RCC_CFGR_MCO1_HSI (0b00)
#define RCC_CFGR_MCO1_HSE (0b10)
#define RCC_CFGR_MCO1_PLL (0b11)
#define RCC_CFGR_MCO1_BIT 21
#define RCC_CFGR_MCO1_MASK (0b11)
#define RCC_CFGR_MCO1PRE_DIV4 (0b110)
#define RCC_CFGR_MCO1PRE_BIT 24
#define RCC_CFGR_MCO1PRE_MASK (0b111)
#define RCC_CFGR_PPRE2_BIT 13
#define RCC_CFGR_PPRE2_MASK (0b111)
@@ -2090,6 +2109,7 @@ struct rcc {
#define RCC_CFGR_SWS_MASK (0b11)
#define RCC_CFGR_SW_PLL (0b10)
#define RCC_CFGR_SW_PLL (0b10)
#define RCC_CFGR_SW_BIT 0
@@ -2097,9 +2117,17 @@ struct rcc {
#define RCC_CFGR_SW(clock) ((clock & RCC_CFGR_SW_MASK) << RCC_CFGR_SW_BIT)
#define RCC_AHB1ENR_GPIOAEN_BIT 0
#define RCC_AHB1ENR_GPIOAEN_ENABLE (1 << RCC_AHB1ENR_GPIOAEN_BIT)
#define RCC_APB1ENR_PWREN_BIT 28
#define RCC_APB1ENR_PWREN_CLOCK_ENABLE (1 << RCC_APB1ENR_PWREN_BIT)
#define RCC_APB1ENR_USART2EN_BIT 17
#define RCC_APB1ENR_USART2EN_ENABLE (1 << RCC_APB1ENR_USART2EN_BIT)
#define RCC_APB1ENR_TIM4_BIT 2
#define RCC_APB1ENR_TIM4_ENABLE (1 << RCC_APB1ENR_TIM4_BIT)
# 5 "src/main.c" 2
@@ -2119,10 +2147,42 @@ struct gpio {
volatile uint32_t ODR;
volatile uint32_t BSRR;
volatile uint32_t LCKR;
volatile uint32_t AFRL[2];
volatile uint32_t AFRH[2];
volatile uint32_t AFRL;
volatile uint32_t AFRH;
};
#define GPIOA_BASE_ADDR (0x40020000U)
#define GPIOA ((struct gpio *) GPIOA_BASE_ADDR)
#define GPIO_MODER_AF_MODE (0b10)
#define GPIO_MODER_MODER8_BIT 16
#define GPIO_MODER_MODER8_MASK (0b11)
#define GPIO_MODER_MODER3_BIT 6
#define GPIO_MODER_MODER3_MASK (0b11)
#define GPIO_MODER_MODER2_BIT 4
#define GPIO_MODER_MODER2_MASK (0b11)
#define GPIO_AFRH_AFRH8_BIT 0
#define GPIO_AFRH_AFRH8_MASK (0b1111)
#define GPIO_AFRH_AFRH8_MCO_1 (0b0000)
#define GPIO_AFRL_AFRL3_BIT 12
#define GPIO_AFRL_AFRL3_MASK (0b1111)
#define GPIO_AFRL_AFRL3_USART2_RX (0b0111)
#define GPIO_AFRL_AFRL2_BIT 8
#define GPIO_AFRL_AFRL2_MASK (0b1111)
#define GPIO_AFRL_AFRL2_USART2_TX (0b0111)
#define GPIO_BASE_ADDR (0x40020000U)
#define GPIO_PORT_OFFSET (0x400U)
#define GPIO(port) ((struct gpio*)(uintptr_t)(GPIO_BASE_ADDR + (GPIO_PORT_OFFSET * port)))
@@ -2144,9 +2204,9 @@ typedef enum {
void gpio_set_mode(uint16_t pin, GPIO_MODE mode);
void gpio_write(uint16_t pin,
# 40 "src/gpio.h" 3 4
# 72 "src/gpio.h" 3 4
_Bool
# 40 "src/gpio.h"
# 72 "src/gpio.h"
val);
# 6 "src/main.c" 2
# 1 "src/flash.h" 1
@@ -2237,12 +2297,75 @@ struct timer {
#define TIM4_BASE_ADDR (0x40000800U)
#define TIM4 ((struct timer *) TIM4_BASE_ADDR)
#define TIM4_CR_CEN_BIT 0
#define TIM4_ENABLE (1 << TIM4_CR_CEN_BIT)
#define TIM_CR1_CEN_BIT 0
#define TIM_ENABLE (1 << TIM_CR1_CEN_BIT)
void tim4_init(void);
void tim4_start(void);
# 9 "src/main.c" 2
# 1 "src/usart.h" 1
#define USART_H_
struct usart {
volatile uint32_t SR;
volatile uint32_t DR;
volatile uint32_t BRR;
volatile uint32_t CR1;
volatile uint32_t CR2;
volatile uint32_t CR3;
volatile uint32_t GTPR;
};
#define USART2_BASE_ADDR (0x40004400U)
#define USART2 ((struct usart *) USART2_BASE_ADDR)
#define USART_SR_TXE_BIT 7
#define USART_SR_TXE_TRANSMITTED (1 << USART_SR_TXE_BIT)
#define USART_SR_TC_BIT 6
#define USART_SR_TC_COMPLETED (1 << USART_SR_TC_BIT)
#define USART_SR_RXNE_BIT 5
#define USART_SR_RXNE_READY (1 <<USART_SR_RXNE_BIT)
#define USART_CR1_OVER8_BIT 15
#define USART_CR1_OVER8_8 (1 << USART_CR1_OVER8_BIT)
#define USART_CR1_UE_BIT 13
#define USART_CR1_UE_ENABLE (1 << USART_CR1_UE_BIT)
#define USART_CR1_TE_BIT 3
#define USART_CR1_TE_ENABLE (1 << USART_CR1_TE_BIT)
#define USART_CR1_RE_BIT 2
#define USART_CR1_RE_ENABLE (1 << USART_CR1_RE_BIT)
#define USART_BRR_MANTISSA_BIT 4
#define USART_BRR_MANTISSA_MASK (0b111111111111)
#define USART_BRR_FRACTION_BIT 0
#define USART_BRR_FRACTION_MASK (0b111)
void usart2_init(void);
void usart2_start(void);
void usart2_write_byte(uint8_t byte);
void usart2_write(char *buf);
# 10 "src/main.c" 2
#define exit 42
@@ -2255,9 +2378,15 @@ static void system_clock_init(void) {
((struct pwr *) (0x40007000U))->CR |= ((0b11) << 14);
((struct rcc *) (0x40023800U))->CR &= ~(1 << 0);
((struct rcc *) (0x40023800U))->CR |= (1 << 16);
((struct rcc *) (0x40023800U))->CR |= (1 << 19);
while (!(((struct rcc *) (0x40023800U))->CR & (1 << 17)));
@@ -2266,10 +2395,11 @@ static void system_clock_init(void) {
((struct rcc *) (0x40023800U))->CR &= ~(1 << 24);
((struct rcc *) (0x40023800U))->PLLCFGR |= (1 << 22);
((struct rcc *) (0x40023800U))->PLLCFGR |= ((25 & (0b111111)) << 0) | ((196 & (0b111111111)) << 6) | ((2 & (0b11)) << 16) | ((4 & (0b1111)) << 24);
((struct rcc *) (0x40023800U))->PLLCFGR |= ((25 & (0b111111)) << 0) | ((192 & (0b111111111)) << 6) | ((2 & (0b11)) << 16) | ((4 & (0b1111)) << 24);
((struct rcc *) (0x40023800U))->CFGR &= ~((0b1111) << 4);
@@ -2288,33 +2418,37 @@ static void system_clock_init(void) {
while (!(((struct rcc *) (0x40023800U))->CR & (1 << 17)));
while (!(((struct rcc *) (0x40023800U))->CR & (1 << 25)));
((struct flash *) (0x40023C00U))->ACR |= (1 <<10);
((struct flash *) (0x40023C00U))->ACR |= (1 <<9);
((struct flash *) (0x40023C00U))->ACR &= ~((0b1111) << 0);
((struct rcc *) (0x40023800U))->CFGR |= ((0x0111) << 0);
((struct rcc *) (0x40023800U))->CFGR &= ~((0b11) << 0);
((struct rcc *) (0x40023800U))->CFGR |= ((0b10) << 0);
# 75 "src/main.c"
((struct rcc *) (0x40023800U))->CFGR |= (((0b10) & (0b11)) << 0);
while (((((struct rcc *) (0x40023800U))->CFGR >> 2) & (0b11)) != (0b10));
((struct rcc *) (0x40023800U))->CR &= ~(1 << 0);
((struct rcc *) (0x40023800U))->CFGR &= ~((0b11) << 21);
((struct rcc *) (0x40023800U))->CFGR |= ((0b00) << 21);
}
int main(void) {
(void) system_clock_init();
(void) tim4_init();
(void) usart2_init();
(void) tim4_start();
(void) usart2_start();
uint16_t led = (((('C') - 'A') << 8) | 13);
((struct rcc *) (0x40023800U))->AHB1ENR |= (1 << (led >> 8));
@@ -2322,19 +2456,22 @@ int main(void) {
uint16_t counter = ((struct timer *) (0x40000800U))->CNT;
# 87 "src/main.c" 3 4
# 106 "src/main.c" 3 4
_Bool
# 87 "src/main.c"
# 106 "src/main.c"
led_on =
# 87 "src/main.c" 3 4
# 106 "src/main.c" 3 4
((_Bool)+0u)
# 87 "src/main.c"
# 106 "src/main.c"
;
while(1) {
if ((((struct timer *) (0x40000800U))->CNT - counter) >= 250) {
led_on = !led_on;
gpio_write(led, led_on);
usart2_write("U\n");
counter = ((struct timer *) (0x40000800U))->CNT;
}
};
build/main.o
BIN
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build/startup.S
+16 -16
View File
@@ -2923,6 +2923,8 @@ interrupt_vector_table:
.ascii "INOR__ >= ((maj) << 16) + (min))\000"
.LASF171:
.ascii "__DBL_MAX__ ((double)1.7976931348623157e+308L)\000"
.LASF602:
.ascii "UINTMAX_C(x) __UINTMAX_C(x)\000"
.LASF253:
.ascii "__USFRACT_MIN__ 0.0UHR\000"
.LASF578:
@@ -3020,8 +3022,8 @@ interrupt_vector_table:
.ascii "__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN__\000"
.LASF200:
.ascii "__FLT32_MIN_10_EXP__ (-37)\000"
.LASF176:
.ascii "__DBL_HAS_DENORM__ 1\000"
.LASF492:
.ascii "__int20\000"
.LASF267:
.ascii "__LFRACT_IBIT__ 0\000"
.LASF497:
@@ -3106,8 +3108,8 @@ interrupt_vector_table:
.ascii "__ARM_NEON\000"
.LASF401:
.ascii "__ARM_FEATURE_CMSE\000"
.LASF625:
.ascii "/home/alex/code/own/c-compile-experiments\000"
.LASF68:
.ascii "__UINTPTR_TYPE__ unsigned int\000"
.LASF229:
.ascii "__FLT64_IS_IEC_60559__ 2\000"
.LASF209:
@@ -3473,8 +3475,6 @@ interrupt_vector_table:
.ascii "UINT16_C(x) __UINT16_C(x)\000"
.LASF344:
.ascii "__UTQ_FBIT__ 128\000"
.LASF499:
.ascii "__int20 +2\000"
.LASF610:
.ascii "long long int\000"
.LASF24:
@@ -3539,8 +3539,8 @@ interrupt_vector_table:
.ascii "__STDC__ 1\000"
.LASF17:
.ascii "__SIZEOF_LONG__ 4\000"
.LASF492:
.ascii "__int20\000"
.LASF499:
.ascii "__int20 +2\000"
.LASF168:
.ascii "__DBL_MAX_EXP__ 1024\000"
.LASF585:
@@ -3567,6 +3567,8 @@ interrupt_vector_table:
.ascii "__SCHAR_WIDTH__ 8\000"
.LASF298:
.ascii "__ACCUM_MIN__ (-0X1P15K-0X1P15K)\000"
.LASF40:
.ascii "__CHAR16_TYPE__ short unsigned int\000"
.LASF21:
.ascii "__SIZEOF_DOUBLE__ 8\000"
.LASF7:
@@ -3801,8 +3803,8 @@ interrupt_vector_table:
.ascii "SIZE_MAX (__SIZE_MAX__)\000"
.LASF54:
.ascii "__INT_LEAST64_TYPE__ long long int\000"
.LASF602:
.ascii "UINTMAX_C(x) __UINTMAX_C(x)\000"
.LASF128:
.ascii "__INT_FAST16_MAX__ 0x7fffffff\000"
.LASF49:
.ascii "__UINT32_TYPE__ long unsigned int\000"
.LASF183:
@@ -3879,8 +3881,8 @@ interrupt_vector_table:
.ascii "INT64_MAX (__INT64_MAX__)\000"
.LASF518:
.ascii "_INT8_T_DECLARED \000"
.LASF40:
.ascii "__CHAR16_TYPE__ short unsigned int\000"
.LASF625:
.ascii "/home/alex/code/own/stm32-falling-sand\000"
.LASF370:
.ascii "__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 1\000"
.LASF151:
@@ -4044,8 +4046,8 @@ interrupt_vector_table:
.ascii "__FLT32X_MAX_10_EXP__ 308\000"
.LASF140:
.ascii "__UINTPTR_MAX__ 0xffffffffU\000"
.LASF128:
.ascii "__INT_FAST16_MAX__ 0x7fffffff\000"
.LASF176:
.ascii "__DBL_HAS_DENORM__ 1\000"
.LASF32:
.ascii "__GNUC_EXECUTION_CHARSET_NAME \"UTF-8\"\000"
.LASF475:
@@ -4072,8 +4074,6 @@ interrupt_vector_table:
.ascii "long +4\000"
.LASF534:
.ascii "__int_least8_t_defined 1\000"
.LASF68:
.ascii "__UINTPTR_TYPE__ unsigned int\000"
.LASF92:
.ascii "__UINTMAX_MAX__ 0xffffffffffffffffULL\000"
.LASF42:
build/startup.i
+1 -1
View File
@@ -1,5 +1,5 @@
# 0 "src/startup.c"
# 1 "/home/alex/code/own/c-compile-experiments//"
# 1 "/home/alex/code/own/stm32-falling-sand//"
# 0 "<built-in>"
#define __STDC__ 1
# 0 "<built-in>"
build/startup.o
BIN
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build/timer.S
+292 -211
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build/timer.i
+31 -3
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@@ -1,5 +1,5 @@
# 0 "src/timer.c"
# 1 "/home/alex/code/own/c-compile-experiments//"
# 1 "/home/alex/code/own/stm32-falling-sand//"
# 0 "<built-in>"
#define __STDC__ 1
# 0 "<built-in>"
@@ -2014,6 +2014,11 @@ struct rcc {
#define RCC_CR_PLLON_ON (1 << RCC_CR_PLLON_BIT)
#define RCC_CR_CSS_BIT 19
#define RCC_CR_CSS_ON (1 << RCC_CR_CSS_BIT)
#define RCC_CR_HSERDY_BIT 17
#define RCC_CR_HSERDY_READY (1 << RCC_CR_HSERDY_BIT)
@@ -2036,6 +2041,7 @@ struct rcc {
#define RCC_PLLCFGR_PLLSRC_BIT 22
#define RCC_PLLCFGR_PLLSRC_HSE (1 << RCC_PLLCFGR_PLLSRC_BIT)
#define RCC_PLLCFGR_PLLSRC_HSI (0 << RCC_PLLCFGR_PLLSRC_BIT)
#define RCC_PLLCFGR_PLLP_BIT 16
#define RCC_PLLCFGR_PLLP_MASK (0b11)
@@ -2055,6 +2061,19 @@ struct rcc {
#define RCC_CFGR_PPRE_DIV_2 (0b100)
#define RCC_CFGR_MCO1_HSI (0b00)
#define RCC_CFGR_MCO1_HSE (0b10)
#define RCC_CFGR_MCO1_PLL (0b11)
#define RCC_CFGR_MCO1_BIT 21
#define RCC_CFGR_MCO1_MASK (0b11)
#define RCC_CFGR_MCO1PRE_DIV4 (0b110)
#define RCC_CFGR_MCO1PRE_BIT 24
#define RCC_CFGR_MCO1PRE_MASK (0b111)
#define RCC_CFGR_PPRE2_BIT 13
#define RCC_CFGR_PPRE2_MASK (0b111)
@@ -2075,6 +2094,7 @@ struct rcc {
#define RCC_CFGR_SWS_MASK (0b11)
#define RCC_CFGR_SW_PLL (0b10)
#define RCC_CFGR_SW_PLL (0b10)
#define RCC_CFGR_SW_BIT 0
@@ -2082,9 +2102,17 @@ struct rcc {
#define RCC_CFGR_SW(clock) ((clock & RCC_CFGR_SW_MASK) << RCC_CFGR_SW_BIT)
#define RCC_AHB1ENR_GPIOAEN_BIT 0
#define RCC_AHB1ENR_GPIOAEN_ENABLE (1 << RCC_AHB1ENR_GPIOAEN_BIT)
#define RCC_APB1ENR_PWREN_BIT 28
#define RCC_APB1ENR_PWREN_CLOCK_ENABLE (1 << RCC_APB1ENR_PWREN_BIT)
#define RCC_APB1ENR_USART2EN_BIT 17
#define RCC_APB1ENR_USART2EN_ENABLE (1 << RCC_APB1ENR_USART2EN_BIT)
#define RCC_APB1ENR_TIM4_BIT 2
#define RCC_APB1ENR_TIM4_ENABLE (1 << RCC_APB1ENR_TIM4_BIT)
# 2 "src/timer.c" 2
@@ -2120,8 +2148,8 @@ struct timer {
#define TIM4_BASE_ADDR (0x40000800U)
#define TIM4 ((struct timer *) TIM4_BASE_ADDR)
#define TIM4_CR_CEN_BIT 0
#define TIM4_ENABLE (1 << TIM4_CR_CEN_BIT)
#define TIM_CR1_CEN_BIT 0
#define TIM_ENABLE (1 << TIM_CR1_CEN_BIT)
void tim4_init(void);
void tim4_start(void);
build/timer.o
BIN
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build/usart.S
+6308
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build/usart.i
+2331
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File diff suppressed because it is too large Load Diff
build/usart.o
BIN
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flake.nix
+30 -23
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@@ -5,31 +5,38 @@
nixpkgs.url = "github:nixos/nixpkgs/nixos-unstable";
};
outputs = { nixpkgs, ... }:
outputs =
{ nixpkgs, ... }:
let
systems = [ "x86_64-linux" ];
in
{
config = {
nixpkgs.config.allowUnfree = true;
};
devShells = nixpkgs.lib.genAttrs systems (system:
let
pkgs = nixpkgs.legacyPackages.${system};
in
{
default = pkgs.mkShell {
packages = [
pkgs.gnumake
pkgs.gcc-arm-embedded
pkgs.stlink
pkgs.gdb
pkgs.openocd
pkgs.gdbgui
];
};
}
);
{
config = {
nixpkgs.config.allowUnfree = true;
};
devShells = nixpkgs.lib.genAttrs systems (
system:
let
# pkgs = nixpkgs.legacyPackages.${system};
pkgs = import nixpkgs {
inherit system;
config.allowUnfree = true;
};
in
{
default = pkgs.mkShell {
packages = [
pkgs.gnumake
pkgs.gcc-arm-embedded
pkgs.stlink
pkgs.gdb
pkgs.openocd
pkgs.stm32cubemx
pkgs.gdbgui
];
};
}
);
};
}
src/gpio.h
+34 -2
View File
@@ -13,10 +13,42 @@ struct gpio {
volatile uint32_t ODR; // Port output data register
volatile uint32_t BSRR; // Port bit set/reset register
volatile uint32_t LCKR; // Port configuration lock register
volatile uint32_t AFRL[2]; // Alternative function low register
volatile uint32_t AFRH[2]; // Alternative function high register
volatile uint32_t AFRL; // Alternative function low register
volatile uint32_t AFRH; // Alternative function high register
};
#define GPIOA_BASE_ADDR (0x40020000U)
#define GPIOA ((struct gpio *) GPIOA_BASE_ADDR)
// MODER register
#define GPIO_MODER_AF_MODE (0b10)
#define GPIO_MODER_MODER8_BIT 16 // Bits [17:16]
#define GPIO_MODER_MODER8_MASK (0b11)
#define GPIO_MODER_MODER3_BIT 6 // Bits [7:6]
#define GPIO_MODER_MODER3_MASK (0b11)
#define GPIO_MODER_MODER2_BIT 4 // Bits [5:4]
#define GPIO_MODER_MODER2_MASK (0b11)
// AFRH register
#define GPIO_AFRH_AFRH8_BIT 0 // Bits [3:0]
#define GPIO_AFRH_AFRH8_MASK (0b1111)
#define GPIO_AFRH_AFRH8_MCO_1 (0b0000) // Alternative function 0 (AF0)
// AFRL register
#define GPIO_AFRL_AFRL3_BIT 12 // Bits [15:12]
#define GPIO_AFRL_AFRL3_MASK (0b1111)
#define GPIO_AFRL_AFRL3_USART2_RX (0b0111) // Alternative function 7 (AF7)
#define GPIO_AFRL_AFRL2_BIT 8 // Bits [11:8]
#define GPIO_AFRL_AFRL2_MASK (0b1111)
#define GPIO_AFRL_AFRL2_USART2_TX (0b0111) // Alternative function 7 (AF7)
// TODO did I intend to remove GPIO, BIT, PIN etc below with GPIOA, GPIOB etc?
#define GPIO_BASE_ADDR (0x40020000U)
#define GPIO_PORT_OFFSET (0x400U)
#define GPIO(port) ((struct gpio*)(uintptr_t)(GPIO_BASE_ADDR + (GPIO_PORT_OFFSET * port)))
src/main.c
+30 -8
View File
@@ -6,6 +6,7 @@
#include "flash.h"
#include "pwr.h"
#include "timer.h"
#include "usart.h"
#define exit 42
@@ -17,9 +18,15 @@ static void system_clock_init(void) {
PWR->CR &= ~(PWR_CR_VOS_MASK << PWR_CR_VOS_BIT);
PWR->CR |= (PWR_SCALE3 << PWR_CR_VOS_BIT);
// Turn off HSI (which is on by default)
RCC->CR &= ~RCC_CR_HSION_ON;
// Turn on HSE
RCC->CR |= RCC_CR_HSEON_ON;
// Turn on clock security system
RCC->CR |= RCC_CR_CSS_ON;
// Wait indefinitely for HSE to be ready
// TODO indicate error/timeout somehow?
while (!(RCC->CR & RCC_CR_HSERDY_READY));
@@ -29,10 +36,11 @@ static void system_clock_init(void) {
RCC->CR &= ~RCC_CR_PLLON_ON;
// Set HSE as PLL source
/* RCC->PLLCFGR |= RCC_PLLCFGR_PLLSRC_HSE; */
RCC->PLLCFGR |= RCC_PLLCFGR_PLLSRC_HSE;
// Settings to achieve system clock of 96Mhz
RCC->PLLCFGR |= RCC_PLLCFGR_PLLM(25) | RCC_PLLCFGR_PLLN(196) | RCC_PLLCFGR_PLLP(2) | RCC_PLLCFGR_PLLQ(4);
RCC->PLLCFGR |= RCC_PLLCFGR_PLLM(25) | RCC_PLLCFGR_PLLN(192) | RCC_PLLCFGR_PLLP(2) | RCC_PLLCFGR_PLLQ(4);
// Set AHB prescalar to /1
RCC->CFGR &= ~(RCC_CFGR_HPRE_MASK << RCC_CFGR_HPRE_BIT);
@@ -51,33 +59,44 @@ static void system_clock_init(void) {
// Wait indefinitely for PLL to be ready
// TODO indicate error/timeout somehow?
while (!(RCC->CR & RCC_CR_HSERDY_READY));
while (!(RCC->CR & RCC_CR_PLLRDY_LOCKED));
// Enable caching of instructions and data
FLASH->ACR |= FLASH_ACR_DCEN_ENABLE;
FLASH->ACR |= FLASH_ACR_ICEN_ENABLE;
// Set latency to be 3 wait states (TODO: understand why exactly 3)
FLASH->ACR &= ~(FLASH_ACR_LATENCY_MASK << FLASH_ACR_LATENCY_BIT);
RCC->CFGR |= (FLASH_ACR_LATENCY_3_WAIT_STATES << FLASH_ACR_LATENCY_BIT);
/* FLASH->ACR &= ~(FLASH_ACR_LATENCY_MASK << FLASH_ACR_LATENCY_BIT); */
/* RCC->CFGR |= (FLASH_ACR_LATENCY_3_WAIT_STATES << FLASH_ACR_LATENCY_BIT); */
// Use PLL as system clock
RCC->CFGR &= ~(RCC_CFGR_SW_MASK << RCC_CFGR_SW_BIT);
RCC->CFGR |= (RCC_CFGR_SW_PLL << RCC_CFGR_SW_BIT);
/* RCC->CFGR &= ~(RCC_CFGR_SW_MASK << RCC_CFGR_SW_BIT); */
/* RCC->CFGR |= (RCC_CFGR_SW_PLL << RCC_CFGR_SW_BIT); */
RCC->CFGR |= RCC_CFGR_SW(RCC_CFGR_SW_PLL);
// Wait indefinitely for PLL clock to be selected
// TODO indicate error/timeout somehow?
while (((RCC->CFGR >> RCC_CFGR_SWS_BIT) & RCC_CFGR_SWS_MASK) != RCC_CFGR_SWS_PLL);
// Turn off HSI (which is on by default)
RCC->CR &= ~RCC_CR_HSION_ON;
// Output HSE clock
RCC->CFGR &= ~(RCC_CFGR_MCO1_MASK << RCC_CFGR_MCO1_BIT);
/* RCC->CFGR |= (RCC_CFGR_MCO1_HSE << RCC_CFGR_MCO1_BIT); */
/* RCC->CFGR |= (RCC_CFGR_MCO1_PLL << RCC_CFGR_MCO1_BIT); */
RCC->CFGR |= (RCC_CFGR_MCO1_HSI << RCC_CFGR_MCO1_BIT);
/* RCC->CFGR &= ~(RCC_CFGR_MCO1PRE_MASK << RCC_CFGR_MCO1PRE_BIT); */
/* RCC->CFGR |= (RCC_CFGR_MCO1PRE_DIV4 << RCC_CFGR_MCO1PRE_BIT); */
}
int main(void) {
(void) system_clock_init();
(void) tim4_init();
(void) usart2_init();
(void) tim4_start();
(void) usart2_start();
uint16_t led = PIN('C', 13); // Blue LED
RCC->AHB1ENR |= BIT(PINPORT(led)); // Enable GPIO clock for LED
@@ -86,10 +105,13 @@ int main(void) {
uint16_t counter = TIM4->CNT;
bool led_on = false;
while(1) {
/* usart2_write("U\n"); */
if ((TIM4->CNT - counter) >= 250) {
led_on = !led_on;
gpio_write(led, led_on);
usart2_write("U\n");
counter = TIM4->CNT;
}
};
src/rcc.h
+28
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@@ -46,6 +46,11 @@ struct rcc {
#define RCC_CR_PLLON_BIT 24
#define RCC_CR_PLLON_ON (1 << RCC_CR_PLLON_BIT)
// Clock security system
#define RCC_CR_CSS_BIT 19
#define RCC_CR_CSS_ON (1 << RCC_CR_CSS_BIT)
// HSE clock ready flag
#define RCC_CR_HSERDY_BIT 17
#define RCC_CR_HSERDY_READY (1 << RCC_CR_HSERDY_BIT)
@@ -69,6 +74,7 @@ struct rcc {
#define RCC_PLLCFGR_PLLSRC_BIT 22
#define RCC_PLLCFGR_PLLSRC_HSE (1 << RCC_PLLCFGR_PLLSRC_BIT)
#define RCC_PLLCFGR_PLLSRC_HSI (0 << RCC_PLLCFGR_PLLSRC_BIT)
#define RCC_PLLCFGR_PLLP_BIT 16 // Bits [17:16]
#define RCC_PLLCFGR_PLLP_MASK (0b11)
@@ -87,6 +93,19 @@ struct rcc {
#define RCC_CFGR_PPRE_DIV_NONE 0
#define RCC_CFGR_PPRE_DIV_2 (0b100)
// Microcontroller clock output 1
#define RCC_CFGR_MCO1_HSI (0b00)
#define RCC_CFGR_MCO1_HSE (0b10)
#define RCC_CFGR_MCO1_PLL (0b11)
#define RCC_CFGR_MCO1_BIT 21 // Bits [22:21]
#define RCC_CFGR_MCO1_MASK (0b11)
#define RCC_CFGR_MCO1PRE_DIV4 (0b110)
#define RCC_CFGR_MCO1PRE_BIT 24 // Bits [26:24]
#define RCC_CFGR_MCO1PRE_MASK (0b111)
// APB2
#define RCC_CFGR_PPRE2_BIT 13 // Bits [15:13]
#define RCC_CFGR_PPRE2_MASK (0b111)
@@ -109,15 +128,24 @@ struct rcc {
// System clock switch
#define RCC_CFGR_SW_PLL (0b10)
#define RCC_CFGR_SW_PLL (0b10)
#define RCC_CFGR_SW_BIT 0 // Bits [1:0]
#define RCC_CFGR_SW_MASK (0b11)
#define RCC_CFGR_SW(clock) ((clock & RCC_CFGR_SW_MASK) << RCC_CFGR_SW_BIT)
// AHB1ENR Register
// GPIOA AHB1ENR
#define RCC_AHB1ENR_GPIOAEN_BIT 0
#define RCC_AHB1ENR_GPIOAEN_ENABLE (1 << RCC_AHB1ENR_GPIOAEN_BIT)
// APB1ENR Register
#define RCC_APB1ENR_PWREN_BIT 28
#define RCC_APB1ENR_PWREN_CLOCK_ENABLE (1 << RCC_APB1ENR_PWREN_BIT)
#define RCC_APB1ENR_USART2EN_BIT 17
#define RCC_APB1ENR_USART2EN_ENABLE (1 << RCC_APB1ENR_USART2EN_BIT)
#define RCC_APB1ENR_TIM4_BIT 2
#define RCC_APB1ENR_TIM4_ENABLE (1 << RCC_APB1ENR_TIM4_BIT)
src/timer.c
+1 -1
View File
@@ -18,5 +18,5 @@ void tim4_init(void) {
}
void tim4_start(void) {
TIM4->CR1 |= TIM4_ENABLE;
TIM4->CR1 |= TIM_ENABLE;
}
src/timer.h
+2 -2
View File
@@ -29,8 +29,8 @@ struct timer {
#define TIM4_BASE_ADDR (0x40000800U)
#define TIM4 ((struct timer *) TIM4_BASE_ADDR)
#define TIM4_CR_CEN_BIT 0
#define TIM4_ENABLE (1 << TIM4_CR_CEN_BIT)
#define TIM_CR1_CEN_BIT 0
#define TIM_ENABLE (1 << TIM_CR1_CEN_BIT)
void tim4_init(void);
void tim4_start(void);
src/usart.c
+80
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@@ -0,0 +1,80 @@
#include "rcc.h"
#include "gpio.h"
#include "usart.h"
void usart2_init(void) {
// Enable clock for GPIOA
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN_ENABLE;
// Configure PA2 and PA3 (USART2 pins) to use alternative functions
// file:///home/alex/sync/org/stm32-sand/stm32f411ce.pdf#page=48
GPIOA->MODER &= ~(GPIO_MODER_MODER2_MASK << GPIO_MODER_MODER2_BIT);
GPIOA->MODER |= (GPIO_MODER_AF_MODE << GPIO_MODER_MODER2_BIT);
GPIOA->MODER &= ~(GPIO_MODER_MODER3_MASK << GPIO_MODER_MODER3_BIT);
GPIOA->MODER |= (GPIO_MODER_AF_MODE << GPIO_MODER_MODER3_BIT);
// Set pin alternative modes to use USART
GPIOA->AFRL &= ~(GPIO_AFRL_AFRL2_MASK << GPIO_AFRL_AFRL2_BIT);
GPIOA->AFRL |= (GPIO_AFRL_AFRL2_USART2_TX << GPIO_AFRL_AFRL2_BIT);
GPIOA->AFRL &= ~(GPIO_AFRL_AFRL3_MASK << GPIO_AFRL_AFRL3_BIT);
GPIOA->AFRL |= (GPIO_AFRL_AFRL3_USART2_RX << GPIO_AFRL_AFRL3_BIT);
// Configure PA8 to output HSE (MCO1)
GPIOA->MODER &= ~(GPIO_MODER_MODER8_MASK << GPIO_MODER_MODER8_BIT);
GPIOA->MODER |= (GPIO_MODER_AF_MODE << GPIO_MODER_MODER8_BIT);
// Set pin alternative mode to use MCO1
GPIOA->AFRH &= ~(GPIO_AFRH_AFRH8_MASK << GPIO_AFRH_AFRH8_BIT);
GPIOA->AFRH |= (GPIO_AFRH_AFRH8_MCO_1 << GPIO_AFRH_AFRH8_BIT);
// Enable USART
RCC->APB1ENR |= RCC_APB1ENR_USART2EN_ENABLE;
// Clear control registers
USART2->CR1 = 0;
USART2->CR2 = 0;
USART2->CR3 = 0;
// Calculate Baud rate:
// baud = f_clck / (8 * (2 - OVER8) * USARTDIV) =>
// (8 * (2 - OVER8) * USARTDIV) = f_clock / baud =>
// baud * (8 * (2 - OVER8) * USARTDIV) = f_clock =>
// USARTDIV = (f_clock / (baud * (8 * (2 - OVER8)))
// Target Baud rate = 115200, f_clock = 48MHz,OVER8 = 0
// USARTDIV = (48E6 / (115200 * (8 * 2))) = 26.0416666
// mantissa = 26
// fraction = 0.041666 * 16 = 0.666656 ~= 1
// baud = 48E6 / (8 * 2 * 26) = 115384.61538461539
// error of 0.001% (115384.61538461539 / 115200 ) = 1.001602564102564
/* USART2->CR1 |= USART_CR1_OVER8_8; */
USART2->BRR &= ~(USART_BRR_MANTISSA_MASK << USART_BRR_MANTISSA_BIT);
USART2->BRR |= (0x68 << USART_BRR_MANTISSA_BIT);
/* USART2->BRR &= ~(USART_BRR_FRACTION_MASK << USART_BRR_FRACTION_BIT); */
USART2->BRR |= (0x2AB << USART_BRR_FRACTION_BIT);
// Enable transmitter and receiver
USART2->CR1 |= USART_CR1_TE_ENABLE;
USART2->CR1 |= USART_CR1_RE_ENABLE;
}
void usart2_start(void) {
USART2->CR1 |= USART_CR1_UE_ENABLE;
}
void usart2_write_byte(uint8_t c) {
// Send data
USART2->DR = c;
// Wait indefinitely for transmission to be ready for data
/* while ((USART2->SR & USART_SR_TXE_TRANSMITTED) == 0); */
while (!(USART2->SR & USART_SR_TC_COMPLETED));
}
void usart2_write(char *buf) {
while (*buf) usart2_write_byte(*buf++);
}
src/usart.h
+63
View File
@@ -0,0 +1,63 @@
#ifndef USART_H_
#define USART_H_
#include <inttypes.h>
struct usart {
volatile uint32_t SR; // Status register
volatile uint32_t DR; // Data register
volatile uint32_t BRR; // Baud rate register
volatile uint32_t CR1; // Control register 1
volatile uint32_t CR2; // Control register 2
volatile uint32_t CR3; // Control register 3
volatile uint32_t GTPR; // Guard time and prescaler registe
};
#define USART2_BASE_ADDR (0x40004400U)
#define USART2 ((struct usart *) USART2_BASE_ADDR)
// SR Register
// Transmission data register empty
#define USART_SR_TXE_BIT 7
#define USART_SR_TXE_TRANSMITTED (1 << USART_SR_TXE_BIT)
// Transmission complete
#define USART_SR_TC_BIT 6
#define USART_SR_TC_COMPLETED (1 << USART_SR_TC_BIT)
// Read data register not empty
#define USART_SR_RXNE_BIT 5
#define USART_SR_RXNE_READY (1 <<USART_SR_RXNE_BIT)
// CR Register
// Oversampling mode
#define USART_CR1_OVER8_BIT 15
#define USART_CR1_OVER8_8 (1 << USART_CR1_OVER8_BIT)
// USART enable
#define USART_CR1_UE_BIT 13
#define USART_CR1_UE_ENABLE (1 << USART_CR1_UE_BIT)
// Trasmitter enable
#define USART_CR1_TE_BIT 3
#define USART_CR1_TE_ENABLE (1 << USART_CR1_TE_BIT)
// Receiver enable
#define USART_CR1_RE_BIT 2
#define USART_CR1_RE_ENABLE (1 << USART_CR1_RE_BIT)
// BRR Register
#define USART_BRR_MANTISSA_BIT 4 // Bits [15:4]
#define USART_BRR_MANTISSA_MASK (0b111111111111)
#define USART_BRR_FRACTION_BIT 0 // Bits [3:0]
#define USART_BRR_FRACTION_MASK (0b111)
void usart2_init(void);
void usart2_start(void);
void usart2_write_byte(uint8_t byte);
void usart2_write(char *buf);
#endif
todo.txt
+2
View File
@@ -0,0 +1,2 @@
- implement UART
- implement tim4 interrupt