99 lines
2.8 KiB
C
99 lines
2.8 KiB
C
#include <inttypes.h>
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#include <stdbool.h>
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#include "rcc.h"
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#include "gpio.h"
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#include "flash.h"
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#include "pwr.h"
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#include "timer.h"
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#define exit 42
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static void system_clock_init(void) {
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// Power on clock for PLL
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RCC->APB1ENR |= RCC_APB1ENR_PWREN_CLOCK_ENABLE;
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// Set voltage scaling to "high"
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PWR->CR &= ~(PWR_CR_VOS_MASK << PWR_CR_VOS_BIT);
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PWR->CR |= (PWR_SCALE3 << PWR_CR_VOS_BIT);
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// Turn on HSE
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RCC->CR |= RCC_CR_HSEON_ON;
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// Wait indefinitely for HSE to be ready
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// TODO indicate error/timeout somehow?
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while (!(RCC->CR & RCC_CR_HSERDY_READY));
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// Disable PLL before changing settings as documentation state
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// "These bits should be written only if PLL is disabled."
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RCC->CR &= ~RCC_CR_PLLON_ON;
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// Set HSE as PLL source
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RCC->PLLCFGR |= RCC_PLLCFGR_PLLSRC_HSE;
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// Settings to achieve system clock of 96Mhz
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RCC->PLLCFGR |= RCC_PLLCFGR_PLLM(25) | RCC_PLLCFGR_PLLN(192) | RCC_PLLCFGR_PLLP(2) | RCC_PLLCFGR_PLLQ(4);
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// Set AHB prescalar to /1
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RCC->CFGR &= ~(RCC_CFGR_HPRE_MASK << RCC_CFGR_HPRE_BIT);
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RCC->CFGR |= (RCC_CFGR_HPRE_DIV_NONE << RCC_CFGR_HPRE_BIT);
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// Set APB1 prescalar to /2
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RCC->CFGR &= ~(RCC_CFGR_PPRE1_MASK << RCC_CFGR_PPRE1_BIT);
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RCC->CFGR |= (RCC_CFGR_PPRE_DIV_2 << RCC_CFGR_PPRE1_BIT);
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// Set APB2 prescalar to /1
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RCC->CFGR &= ~(RCC_CFGR_PPRE2_MASK << RCC_CFGR_PPRE2_BIT);
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RCC->CFGR |= (RCC_CFGR_PPRE_DIV_NONE << RCC_CFGR_PPRE2_BIT);
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// Turn PLL back on
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RCC->CR |= RCC_CR_PLLON_ON;
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// Wait indefinitely for PLL to be ready
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// TODO indicate error/timeout somehow?
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while (!(RCC->CR & RCC_CR_PLLRDY_LOCKED));
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// Enable caching of instructions and data
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FLASH->ACR |= FLASH_ACR_DCEN_ENABLE;
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FLASH->ACR |= FLASH_ACR_ICEN_ENABLE;
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// Set latency to be 3 wait states (TODO: understand why exactly 3)
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FLASH->ACR &= ~(FLASH_ACR_LATENCY_MASK << FLASH_ACR_LATENCY_BIT);
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RCC->CFGR |= (FLASH_ACR_LATENCY_3_WAIT_STATES << FLASH_ACR_LATENCY_BIT);
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// Use PLL as system clock
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RCC->CFGR &= ~(RCC_CFGR_SW_MASK << RCC_CFGR_SW_BIT);
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RCC->CFGR |= (RCC_CFGR_SW_PLL << RCC_CFGR_SW_BIT);
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// Wait indefinitely for PLL clock to be selected
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// TODO indicate error/timeout somehow?
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while (((RCC->CFGR >> RCC_CFGR_SWS_BIT) & RCC_CFGR_SWS_MASK) != RCC_CFGR_SWS_PLL);
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// Turn off HSI (which is on by default)
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RCC->CR &= ~RCC_CR_HSION_ON;
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}
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int main(void) {
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(void) system_clock_init();
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(void) tim4_init();
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(void) tim4_start();
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uint16_t led = PIN('C', 13); // Blue LED
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RCC->AHB1ENR |= BIT(PINPORT(led)); // Enable GPIO clock for LED
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gpio_set_mode(led, GPIO_MODE_OUTPUT); // Set blue LED to output mode
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uint16_t counter = TIM4->CNT;
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bool led_on = false;
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while(1) {
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if ((TIM4->CNT - counter) >= 250) {
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led_on = !led_on;
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gpio_write(led, led_on);
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counter = TIM4->CNT;
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}
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};
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return exit;
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}
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