wip
This commit is contained in:
BIN
build/final.elf
BIN
build/final.elf
Binary file not shown.
@@ -116,8 +116,6 @@ Discarded input sections
|
||||
.text 0x00000000 0x0 build/usart.o
|
||||
.data 0x00000000 0x0 build/usart.o
|
||||
.bss 0x00000000 0x0 build/usart.o
|
||||
.text.usart2_start
|
||||
0x00000000 0x20 build/usart.o
|
||||
.debug_macro 0x00000000 0x22 build/usart.o
|
||||
.debug_macro 0x00000000 0x75 build/usart.o
|
||||
.debug_macro 0x00000000 0x2a build/usart.o
|
||||
@@ -132,7 +130,7 @@ Discarded input sections
|
||||
.debug_macro 0x00000000 0x4cc build/usart.o
|
||||
.debug_macro 0x00000000 0x13e build/usart.o
|
||||
.debug_macro 0x00000000 0x22 build/usart.o
|
||||
.debug_macro 0x00000000 0x5e build/usart.o
|
||||
.debug_macro 0x00000000 0x76 build/usart.o
|
||||
|
||||
Memory Configuration
|
||||
|
||||
@@ -159,7 +157,7 @@ LOAD build/usart.o
|
||||
0x08000000 interrupt_vector_table
|
||||
0x08000198 . = ALIGN (0x4)
|
||||
|
||||
.text 0x08000198 0x458
|
||||
.text 0x08000198 0x4b0
|
||||
0x08000198 . = ALIGN (0x4)
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
@@ -172,116 +170,122 @@ LOAD build/usart.o
|
||||
*fill* 0x08000246 0x2
|
||||
.text.system_clock_init
|
||||
0x08000248 0x144 build/main.o
|
||||
.text.main 0x0800038c 0x90 build/main.o
|
||||
.text.main 0x0800038c 0x98 build/main.o
|
||||
0x0800038c main
|
||||
.text.init_memory
|
||||
0x0800041c 0x64 build/startup.o
|
||||
0x0800041c init_memory
|
||||
.text.reset 0x08000480 0x10 build/startup.o
|
||||
0x08000480 reset
|
||||
0x08000424 0x64 build/startup.o
|
||||
0x08000424 init_memory
|
||||
.text.reset 0x08000488 0x10 build/startup.o
|
||||
0x08000488 reset
|
||||
.text.default_handler
|
||||
0x08000490 0x8 build/startup.o
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||||
0x08000490 exti0
|
||||
0x08000490 debug_monitor
|
||||
0x08000490 rcc
|
||||
0x08000490 x
|
||||
0x08000490 sdio
|
||||
0x08000490 usage_fault
|
||||
0x08000490 tim1_up_tim10
|
||||
0x08000490 usart1
|
||||
0x08000490 i2c3_er
|
||||
0x08000490 spi2
|
||||
0x08000490 dma1_stream1
|
||||
0x08000490 bus_fault
|
||||
0x08000490 spi5
|
||||
0x08000490 exti3
|
||||
0x08000490 dma2_stream5
|
||||
0x08000490 tim2
|
||||
0x08000490 dma1_stream6
|
||||
0x08000490 default_handler
|
||||
0x08000490 i2c1_er
|
||||
0x08000490 hard_fault
|
||||
0x08000490 usart6
|
||||
0x08000490 exti15_10
|
||||
0x08000490 usart2
|
||||
0x08000490 pend_sv
|
||||
0x08000490 i2c1_ev
|
||||
0x08000490 wwdg
|
||||
0x08000490 adc
|
||||
0x08000490 rtc_alarm
|
||||
0x08000490 spi3
|
||||
0x08000490 exti1
|
||||
0x08000490 mem_manage
|
||||
0x08000490 dma2_stream1
|
||||
0x08000490 dma1_stream2
|
||||
0x08000490 dma2_stream3
|
||||
0x08000490 sv_call
|
||||
0x08000490 tim3
|
||||
0x08000490 otg_fs
|
||||
0x08000490 dma1_stream5
|
||||
0x08000490 dma2_stream6
|
||||
0x08000490 flash
|
||||
0x08000490 tamp_stamp
|
||||
0x08000490 i2c3_ev
|
||||
0x08000490 rtc_wkup
|
||||
0x08000490 dma2_stream0
|
||||
0x08000490 pvd
|
||||
0x08000490 fpu
|
||||
0x08000490 exti4
|
||||
0x08000490 exti2
|
||||
0x08000490 spi1
|
||||
0x08000490 dma1_stream0
|
||||
0x08000490 tim1_brk_tim9
|
||||
0x08000490 i2c2_ev
|
||||
0x08000490 otg_fs_wkup
|
||||
0x08000490 spi4
|
||||
0x08000490 dma2_stream2
|
||||
0x08000490 tim1_cc
|
||||
0x08000490 tim1_trg_com_tim11
|
||||
0x08000490 exti9_5
|
||||
0x08000490 dma1_stream3
|
||||
0x08000490 dma2_stream4
|
||||
0x08000490 i2c2_er
|
||||
0x08000490 dma2_stream7
|
||||
0x08000490 dma1_stream7
|
||||
0x08000490 nmi
|
||||
0x08000490 systick
|
||||
0x08000490 tim4
|
||||
0x08000490 tim5
|
||||
0x08000490 dma1_stream4
|
||||
0x08000498 0x8 build/startup.o
|
||||
0x08000498 exti0
|
||||
0x08000498 debug_monitor
|
||||
0x08000498 rcc
|
||||
0x08000498 x
|
||||
0x08000498 sdio
|
||||
0x08000498 usage_fault
|
||||
0x08000498 tim1_up_tim10
|
||||
0x08000498 usart1
|
||||
0x08000498 i2c3_er
|
||||
0x08000498 spi2
|
||||
0x08000498 dma1_stream1
|
||||
0x08000498 bus_fault
|
||||
0x08000498 spi5
|
||||
0x08000498 exti3
|
||||
0x08000498 dma2_stream5
|
||||
0x08000498 tim2
|
||||
0x08000498 dma1_stream6
|
||||
0x08000498 default_handler
|
||||
0x08000498 i2c1_er
|
||||
0x08000498 hard_fault
|
||||
0x08000498 usart6
|
||||
0x08000498 exti15_10
|
||||
0x08000498 usart2
|
||||
0x08000498 pend_sv
|
||||
0x08000498 i2c1_ev
|
||||
0x08000498 wwdg
|
||||
0x08000498 adc
|
||||
0x08000498 rtc_alarm
|
||||
0x08000498 spi3
|
||||
0x08000498 exti1
|
||||
0x08000498 mem_manage
|
||||
0x08000498 dma2_stream1
|
||||
0x08000498 dma1_stream2
|
||||
0x08000498 dma2_stream3
|
||||
0x08000498 sv_call
|
||||
0x08000498 tim3
|
||||
0x08000498 otg_fs
|
||||
0x08000498 dma1_stream5
|
||||
0x08000498 dma2_stream6
|
||||
0x08000498 flash
|
||||
0x08000498 tamp_stamp
|
||||
0x08000498 i2c3_ev
|
||||
0x08000498 rtc_wkup
|
||||
0x08000498 dma2_stream0
|
||||
0x08000498 pvd
|
||||
0x08000498 fpu
|
||||
0x08000498 exti4
|
||||
0x08000498 exti2
|
||||
0x08000498 spi1
|
||||
0x08000498 dma1_stream0
|
||||
0x08000498 tim1_brk_tim9
|
||||
0x08000498 i2c2_ev
|
||||
0x08000498 otg_fs_wkup
|
||||
0x08000498 spi4
|
||||
0x08000498 dma2_stream2
|
||||
0x08000498 tim1_cc
|
||||
0x08000498 tim1_trg_com_tim11
|
||||
0x08000498 exti9_5
|
||||
0x08000498 dma1_stream3
|
||||
0x08000498 dma2_stream4
|
||||
0x08000498 i2c2_er
|
||||
0x08000498 dma2_stream7
|
||||
0x08000498 dma1_stream7
|
||||
0x08000498 nmi
|
||||
0x08000498 systick
|
||||
0x08000498 tim4
|
||||
0x08000498 tim5
|
||||
0x08000498 dma1_stream4
|
||||
.text.tim4_init
|
||||
0x08000498 0x40 build/timer.o
|
||||
0x08000498 tim4_init
|
||||
0x080004a0 0x40 build/timer.o
|
||||
0x080004a0 tim4_init
|
||||
.text.tim4_start
|
||||
0x080004d8 0x20 build/timer.o
|
||||
0x080004d8 tim4_start
|
||||
0x080004e0 0x20 build/timer.o
|
||||
0x080004e0 tim4_start
|
||||
.text.usart2_init
|
||||
0x080004f8 0xf8 build/usart.o
|
||||
0x080004f8 usart2_init
|
||||
0x08000500 0xf8 build/usart.o
|
||||
0x08000500 usart2_init
|
||||
.text.usart2_start
|
||||
0x080005f8 0x20 build/usart.o
|
||||
0x080005f8 usart2_start
|
||||
.text.usart2_write_byte
|
||||
0x08000618 0x30 build/usart.o
|
||||
0x08000618 usart2_write_byte
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
0x080005f0 . = ALIGN (0x4)
|
||||
0x080005f0 _data_addr = LOADADDR (.data)
|
||||
0x08000648 . = ALIGN (0x4)
|
||||
0x08000648 _data_addr = LOADADDR (.data)
|
||||
|
||||
.glue_7 0x080005f0 0x0
|
||||
.glue_7 0x080005f0 0x0 linker stubs
|
||||
.glue_7 0x08000648 0x0
|
||||
.glue_7 0x08000648 0x0 linker stubs
|
||||
|
||||
.glue_7t 0x080005f0 0x0
|
||||
.glue_7t 0x080005f0 0x0 linker stubs
|
||||
.glue_7t 0x08000648 0x0
|
||||
.glue_7t 0x08000648 0x0 linker stubs
|
||||
|
||||
.vfp11_veneer 0x080005f0 0x0
|
||||
.vfp11_veneer 0x080005f0 0x0 linker stubs
|
||||
.vfp11_veneer 0x08000648 0x0
|
||||
.vfp11_veneer 0x08000648 0x0 linker stubs
|
||||
|
||||
.v4_bx 0x080005f0 0x0
|
||||
.v4_bx 0x080005f0 0x0 linker stubs
|
||||
.v4_bx 0x08000648 0x0
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||||
.v4_bx 0x08000648 0x0 linker stubs
|
||||
|
||||
.iplt 0x080005f0 0x0
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||||
.iplt 0x080005f0 0x0 build/main.o
|
||||
.iplt 0x08000648 0x0
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||||
.iplt 0x08000648 0x0 build/main.o
|
||||
|
||||
.rel.dyn 0x080005f0 0x0
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||||
.rel.iplt 0x080005f0 0x0 build/main.o
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||||
.rel.dyn 0x08000648 0x0
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||||
.rel.iplt 0x08000648 0x0 build/main.o
|
||||
|
||||
.data 0x20000000 0x0 load address 0x080005f0
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||||
.data 0x20000000 0x0 load address 0x08000648
|
||||
0x20000000 . = ALIGN (0x4)
|
||||
0x20000000 _data_start = .
|
||||
*(.data)
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||||
@@ -289,10 +293,10 @@ LOAD build/usart.o
|
||||
0x20000000 . = ALIGN (0x4)
|
||||
0x20000000 _data_end = .
|
||||
|
||||
.igot.plt 0x20000000 0x0 load address 0x080005f0
|
||||
.igot.plt 0x20000000 0x0 load address 0x08000648
|
||||
.igot.plt 0x20000000 0x0 build/main.o
|
||||
|
||||
.bss 0x20000000 0x0 load address 0x080005f0
|
||||
.bss 0x20000000 0x0 load address 0x08000648
|
||||
0x20000000 . = ALIGN (0x4)
|
||||
0x20000000 _bss_start = .
|
||||
*(.bss)
|
||||
@@ -302,21 +306,21 @@ LOAD build/usart.o
|
||||
OUTPUT(build/final.elf elf32-littlearm)
|
||||
LOAD linker stubs
|
||||
|
||||
.debug_info 0x00000000 0xe1d
|
||||
.debug_info 0x00000000 0xe69
|
||||
.debug_info 0x00000000 0x205 build/gpio.o
|
||||
.debug_info 0x00000205 0x457 build/main.o
|
||||
.debug_info 0x0000065c 0x188 build/startup.o
|
||||
.debug_info 0x000007e4 0x335 build/timer.o
|
||||
.debug_info 0x00000b19 0x304 build/usart.o
|
||||
.debug_info 0x00000205 0x478 build/main.o
|
||||
.debug_info 0x0000067d 0x188 build/startup.o
|
||||
.debug_info 0x00000805 0x335 build/timer.o
|
||||
.debug_info 0x00000b3a 0x32f build/usart.o
|
||||
|
||||
.debug_abbrev 0x00000000 0x4ee
|
||||
.debug_abbrev 0x00000000 0x519
|
||||
.debug_abbrev 0x00000000 0x119 build/gpio.o
|
||||
.debug_abbrev 0x00000119 0x143 build/main.o
|
||||
.debug_abbrev 0x0000025c 0x127 build/startup.o
|
||||
.debug_abbrev 0x00000383 0xb5 build/timer.o
|
||||
.debug_abbrev 0x00000438 0xb6 build/usart.o
|
||||
.debug_abbrev 0x00000119 0x142 build/main.o
|
||||
.debug_abbrev 0x0000025b 0x127 build/startup.o
|
||||
.debug_abbrev 0x00000382 0xb5 build/timer.o
|
||||
.debug_abbrev 0x00000437 0xe2 build/usart.o
|
||||
|
||||
.debug_aranges 0x00000000 0xd0
|
||||
.debug_aranges 0x00000000 0xd8
|
||||
.debug_aranges
|
||||
0x00000000 0x28 build/gpio.o
|
||||
.debug_aranges
|
||||
@@ -326,10 +330,10 @@ LOAD linker stubs
|
||||
.debug_aranges
|
||||
0x00000080 0x28 build/timer.o
|
||||
.debug_aranges
|
||||
0x000000a8 0x28 build/usart.o
|
||||
0x000000a8 0x30 build/usart.o
|
||||
|
||||
.debug_rnglists
|
||||
0x00000000 0x86
|
||||
0x00000000 0x8c
|
||||
.debug_rnglists
|
||||
0x00000000 0x19 build/gpio.o
|
||||
.debug_rnglists
|
||||
@@ -339,9 +343,9 @@ LOAD linker stubs
|
||||
.debug_rnglists
|
||||
0x00000053 0x19 build/timer.o
|
||||
.debug_rnglists
|
||||
0x0000006c 0x1a build/usart.o
|
||||
0x0000006c 0x20 build/usart.o
|
||||
|
||||
.debug_macro 0x00000000 0x4885
|
||||
.debug_macro 0x00000000 0x489d
|
||||
.debug_macro 0x00000000 0xb56 build/gpio.o
|
||||
.debug_macro 0x00000b56 0x22 build/gpio.o
|
||||
.debug_macro 0x00000b78 0x75 build/gpio.o
|
||||
@@ -362,33 +366,33 @@ LOAD linker stubs
|
||||
.debug_macro 0x00002358 0x46 build/main.o
|
||||
.debug_macro 0x0000239e 0x2e build/main.o
|
||||
.debug_macro 0x000023cc 0x22 build/main.o
|
||||
.debug_macro 0x000023ee 0x5e build/main.o
|
||||
.debug_macro 0x0000244c 0xb02 build/startup.o
|
||||
.debug_macro 0x00002f4e 0x56 build/startup.o
|
||||
.debug_macro 0x00002fa4 0x51 build/startup.o
|
||||
.debug_macro 0x00002ff5 0xb5c build/timer.o
|
||||
.debug_macro 0x00003b51 0x13e build/timer.o
|
||||
.debug_macro 0x00003c8f 0xb74 build/usart.o
|
||||
.debug_macro 0x00004803 0x82 build/usart.o
|
||||
.debug_macro 0x000023ee 0x76 build/main.o
|
||||
.debug_macro 0x00002464 0xb02 build/startup.o
|
||||
.debug_macro 0x00002f66 0x56 build/startup.o
|
||||
.debug_macro 0x00002fbc 0x51 build/startup.o
|
||||
.debug_macro 0x0000300d 0xb5c build/timer.o
|
||||
.debug_macro 0x00003b69 0x13e build/timer.o
|
||||
.debug_macro 0x00003ca7 0xb74 build/usart.o
|
||||
.debug_macro 0x0000481b 0x82 build/usart.o
|
||||
|
||||
.debug_line 0x00000000 0x605
|
||||
.debug_line 0x00000000 0x63b
|
||||
.debug_line 0x00000000 0x116 build/gpio.o
|
||||
.debug_line 0x00000116 0x1e1 build/main.o
|
||||
.debug_line 0x000002f7 0xea build/startup.o
|
||||
.debug_line 0x000003e1 0xdf build/timer.o
|
||||
.debug_line 0x000004c0 0x145 build/usart.o
|
||||
.debug_line 0x00000116 0x1e4 build/main.o
|
||||
.debug_line 0x000002fa 0xea build/startup.o
|
||||
.debug_line 0x000003e4 0xdf build/timer.o
|
||||
.debug_line 0x000004c3 0x178 build/usart.o
|
||||
|
||||
.debug_str 0x00000000 0x62fd
|
||||
.debug_str 0x00000000 0x6393
|
||||
.debug_str 0x00000000 0x550b build/gpio.o
|
||||
0x56b3 (size before relaxing)
|
||||
.debug_str 0x0000550b 0xd3a build/main.o
|
||||
0x639d (size before relaxing)
|
||||
.debug_str 0x00006245 0x88 build/startup.o
|
||||
.debug_str 0x0000550b 0xddd build/main.o
|
||||
0x6440 (size before relaxing)
|
||||
.debug_str 0x000062e8 0x88 build/startup.o
|
||||
0x3cdf (size before relaxing)
|
||||
.debug_str 0x000062cd 0xc build/timer.o
|
||||
.debug_str 0x00006370 0xc build/timer.o
|
||||
0x5bc5 (size before relaxing)
|
||||
.debug_str 0x000062d9 0x24 build/usart.o
|
||||
0x5ffb (size before relaxing)
|
||||
.debug_str 0x0000637c 0x17 build/usart.o
|
||||
0x6091 (size before relaxing)
|
||||
|
||||
.comment 0x00000000 0x45
|
||||
.comment 0x00000000 0x45 build/gpio.o
|
||||
@@ -429,9 +433,9 @@ LOAD linker stubs
|
||||
0x0000028b 0x8 build/usart.o
|
||||
0x26f (size before relaxing)
|
||||
|
||||
.debug_frame 0x00000000 0x1bc
|
||||
.debug_frame 0x00000000 0x1e4
|
||||
.debug_frame 0x00000000 0x60 build/gpio.o
|
||||
.debug_frame 0x00000060 0x50 build/main.o
|
||||
.debug_frame 0x000000b0 0x6c build/startup.o
|
||||
.debug_frame 0x0000011c 0x50 build/timer.o
|
||||
.debug_frame 0x0000016c 0x50 build/usart.o
|
||||
.debug_frame 0x0000016c 0x78 build/usart.o
|
||||
|
||||
494
build/main.S
494
build/main.S
File diff suppressed because it is too large
Load Diff
15
build/main.i
15
build/main.i
@@ -2298,6 +2298,15 @@ struct usart {
|
||||
|
||||
|
||||
|
||||
#define USART_SR_TXE_BIT 7
|
||||
#define USART_SR_TXE_TRANSMITTED (1 << USART_SR_TXE_BIT)
|
||||
|
||||
|
||||
#define USART_SR_RXNE_BIT 5
|
||||
#define USART_SR_RXNE_READY (1 <<USART_SR_RXNE_BIT)
|
||||
|
||||
|
||||
|
||||
#define USART_CR1_OVER8_BIT 15
|
||||
#define USART_CR1_OVER8_8 (1 << USART_CR1_OVER8_BIT)
|
||||
|
||||
@@ -2322,6 +2331,8 @@ struct usart {
|
||||
|
||||
void usart2_init(void);
|
||||
void usart2_start(void);
|
||||
|
||||
void usart2_write_byte(char byte);
|
||||
# 10 "src/main.c" 2
|
||||
|
||||
#define exit 42
|
||||
@@ -2396,7 +2407,7 @@ int main(void) {
|
||||
(void) usart2_init();
|
||||
|
||||
(void) tim4_start();
|
||||
(void) tim4_start();
|
||||
(void) usart2_start();
|
||||
|
||||
uint16_t led = (((('C') - 'A') << 8) | 13);
|
||||
((struct rcc *) (0x40023800U))->AHB1ENR |= (1 << (led >> 8));
|
||||
@@ -2417,6 +2428,8 @@ int main(void) {
|
||||
led_on = !led_on;
|
||||
gpio_write(led, led_on);
|
||||
|
||||
usart2_write_byte('a');
|
||||
|
||||
counter = ((struct timer *) (0x40000800U))->CNT;
|
||||
}
|
||||
};
|
||||
|
||||
BIN
build/main.o
BIN
build/main.o
Binary file not shown.
469
build/usart.S
469
build/usart.S
File diff suppressed because it is too large
Load Diff
@@ -2201,6 +2201,15 @@ struct usart {
|
||||
|
||||
|
||||
|
||||
#define USART_SR_TXE_BIT 7
|
||||
#define USART_SR_TXE_TRANSMITTED (1 << USART_SR_TXE_BIT)
|
||||
|
||||
|
||||
#define USART_SR_RXNE_BIT 5
|
||||
#define USART_SR_RXNE_READY (1 <<USART_SR_RXNE_BIT)
|
||||
|
||||
|
||||
|
||||
#define USART_CR1_OVER8_BIT 15
|
||||
#define USART_CR1_OVER8_8 (1 << USART_CR1_OVER8_BIT)
|
||||
|
||||
@@ -2225,6 +2234,8 @@ struct usart {
|
||||
|
||||
void usart2_init(void);
|
||||
void usart2_start(void);
|
||||
|
||||
void usart2_write_byte(char byte);
|
||||
# 4 "src/usart.c" 2
|
||||
|
||||
void usart2_init(void) {
|
||||
@@ -2254,9 +2265,9 @@ void usart2_init(void) {
|
||||
((struct usart *) (0x40004400U))->CR1 |= (1 << 15);
|
||||
|
||||
((struct usart *) (0x40004400U))->BRR &= ~((0b111111111111) << 4);
|
||||
((struct usart *) (0x40004400U))->BRR |= (52 << 4);
|
||||
((struct usart *) (0x40004400U))->BRR |= (0x34 << 4);
|
||||
((struct usart *) (0x40004400U))->BRR &= ~((0b111) << 0);
|
||||
((struct usart *) (0x40004400U))->BRR |= (0 << 0);
|
||||
((struct usart *) (0x40004400U))->BRR |= (0x0 << 0);
|
||||
|
||||
|
||||
((struct usart *) (0x40004400U))->CR1 |= (1 << 3);
|
||||
@@ -2266,3 +2277,11 @@ void usart2_init(void) {
|
||||
void usart2_start(void) {
|
||||
((struct usart *) (0x40004400U))->CR1 |= (1 << 13);
|
||||
}
|
||||
|
||||
void usart2_write_byte(char c) {
|
||||
|
||||
((struct usart *) (0x40004400U))->DR = c;
|
||||
|
||||
|
||||
while ((((struct usart *) (0x40004400U))->SR & (1 << 7)) == 0);
|
||||
}
|
||||
|
||||
BIN
build/usart.o
BIN
build/usart.o
Binary file not shown.
@@ -80,7 +80,7 @@ int main(void) {
|
||||
(void) usart2_init();
|
||||
|
||||
(void) tim4_start();
|
||||
(void) tim4_start();
|
||||
(void) usart2_start();
|
||||
|
||||
uint16_t led = PIN('C', 13); // Blue LED
|
||||
RCC->AHB1ENR |= BIT(PINPORT(led)); // Enable GPIO clock for LED
|
||||
@@ -93,8 +93,7 @@ int main(void) {
|
||||
led_on = !led_on;
|
||||
gpio_write(led, led_on);
|
||||
|
||||
while ((USART2->ISR & USART_ISR_TC) != USART_ISR_TC);
|
||||
USART2->TDR = '#';
|
||||
usart2_write_byte('a');
|
||||
|
||||
counter = TIM4->CNT;
|
||||
}
|
||||
|
||||
12
src/usart.c
12
src/usart.c
@@ -49,9 +49,9 @@ void usart2_init(void) {
|
||||
USART2->CR1 |= USART_CR1_OVER8_8;
|
||||
|
||||
USART2->BRR &= ~(USART_BRR_MANTISSA_MASK << USART_BRR_MANTISSA_BIT);
|
||||
USART2->BRR |= (52 << USART_BRR_MANTISSA_BIT);
|
||||
USART2->BRR |= (0x34 << USART_BRR_MANTISSA_BIT);
|
||||
USART2->BRR &= ~(USART_BRR_FRACTION_MASK << USART_BRR_FRACTION_BIT);
|
||||
USART2->BRR |= (0 << USART_BRR_FRACTION_BIT);
|
||||
USART2->BRR |= (0x0 << USART_BRR_FRACTION_BIT);
|
||||
|
||||
// Enable transmitter and receiver
|
||||
USART2->CR1 |= USART_CR1_TE_ENABLE;
|
||||
@@ -61,3 +61,11 @@ void usart2_init(void) {
|
||||
void usart2_start(void) {
|
||||
USART2->CR1 |= USART_CR1_UE_ENABLE;
|
||||
}
|
||||
|
||||
void usart2_write_byte(char c) {
|
||||
// Send data
|
||||
USART2->DR = c;
|
||||
|
||||
// Wait indefinitely for transmission to be ready for data
|
||||
while ((USART2->SR & USART_SR_TXE_TRANSMITTED) == 0);
|
||||
}
|
||||
|
||||
11
src/usart.h
11
src/usart.h
@@ -16,6 +16,15 @@ struct usart {
|
||||
#define USART2_BASE_ADDR (0x40004400U)
|
||||
#define USART2 ((struct usart *) USART2_BASE_ADDR)
|
||||
|
||||
// SR Register
|
||||
// Transmission data register empty
|
||||
#define USART_SR_TXE_BIT 7
|
||||
#define USART_SR_TXE_TRANSMITTED (1 << USART_SR_TXE_BIT)
|
||||
|
||||
// Read data register not empty
|
||||
#define USART_SR_RXNE_BIT 5
|
||||
#define USART_SR_RXNE_READY (1 <<USART_SR_RXNE_BIT)
|
||||
|
||||
// CR Register
|
||||
// Oversampling mode
|
||||
#define USART_CR1_OVER8_BIT 15
|
||||
@@ -43,4 +52,6 @@ struct usart {
|
||||
void usart2_init(void);
|
||||
void usart2_start(void);
|
||||
|
||||
void usart2_write_byte(char byte);
|
||||
|
||||
#endif
|
||||
|
||||
Reference in New Issue
Block a user