Correctly check PLL readiness

build/main.S

@@ -150,7 +150,7 @@ system_clock_init:
 	ldr	r3, .L5
 	ldr	r3, [r3]
 	.loc 1 54 47 discriminator 1
-	and	r3, r3, #131072
+	and	r3, r3, #33554432
 	.loc 1 54 10 discriminator 1
 	cmp	r3, #0
 	beq	.L3

build/main.i

@@ -2288,7 +2288,7 @@ static void system_clock_init(void) {
 
 
 
-  while (!(((struct rcc *) (0x40023800U))->CR & (1 << 17)));
+  while (!(((struct rcc *) (0x40023800U))->CR & (1 << 25)));
 
 
   ((struct flash *) (0x40023C00U))->ACR |= (1 <<10);