Commit Graph

26 Commits

Author SHA1 Message Date
Alexander Heldt
4600e8e838 Disable FLASH wait states
As it blocks the mc from reaching a ready state for unknown reason(s)
2025-01-01 12:50:22 +01:00
Alexander Heldt
1ae81edf57 Add ability to debug clock with MCO1 2025-01-01 12:49:31 +01:00
Alexander Heldt
55ee09eab8 Use USART2 2025-01-01 12:49:18 +01:00
Alexander Heldt
95455a7161 Add usart.{h, c} 2025-01-01 12:49:04 +01:00
Alexander Heldt
992b3c5b97 Add gpio_set_af to set alternative function of a pin 2025-01-01 12:47:01 +01:00
Alexander Heldt
3f95f00852 Add PORT macro
And use it in the `PIN` macro
2025-01-01 12:46:44 +01:00
Alexander Heldt
2a1e3a41da Fix gpio_set_mode masking 2025-01-01 12:46:31 +01:00
Alexander Heldt
152a9ad8a7 Remove BIT macro 2025-01-01 12:46:01 +01:00
Alexander Heldt
980b9a2d9b GPIO alternative function registers are 32bit each, not 64bit 2025-01-01 12:44:28 +01:00
Alexander Heldt
3aad7271a1 Use RCC_CFGR_SW helper function to set software clock 2025-01-01 12:44:10 +01:00
Alexander Heldt
11f469564f Turn off HSI earlier 2025-01-01 12:43:48 +01:00
Alexander Heldt
916d7d9620 Set correct PLL N for 96MHz 2025-01-01 12:43:43 +01:00
Alexander Heldt
a63527a997 Correctly check PLL readiness 2025-01-01 12:43:19 +01:00
Alexander Heldt
a1c43ad21c TIM4 runs at 96MHz, not 48MHz 2025-01-01 12:42:46 +01:00
Alexander Heldt
8f3285072b Generalise naming of TIMx_ENABLE 2025-01-01 12:42:26 +01:00
Alexander Heldt
a3c1de878a Blink LED with timer 2024-08-11 12:31:34 +02:00
Alexander Heldt
d9389b4eb8 Configure system clock to run at 96Mhz 2024-08-11 12:31:04 +02:00
Alexander Heldt
0fec3d6a6c Add clock configuration registers to rcc.h 2024-08-03 11:56:22 +02:00
Alexander Heldt
5b5da238d5 Blink LED with spin function 2024-08-03 11:55:27 +02:00
Alexander Heldt
a8a5e21b77 Add gpio.{h, c} 2024-08-03 11:55:27 +02:00
Alexander Heldt
11d10f41c2 Add all interrupt/exception handlers with default alias 2024-08-03 11:55:27 +02:00
Alexander Heldt
cc8380759b Add #define for main exit code 2024-08-03 11:55:27 +02:00
Alexander Heldt
8c8a72df71 Add linking step 2024-08-03 11:55:27 +02:00
Alexander Heldt
4c77450e47 Add assemble step 2024-08-03 11:55:26 +02:00
Alexander Heldt
f5ce434891 Add compilation step 2024-08-03 11:55:08 +02:00
Alexander Heldt
3dab4aece3 Add preprocessing step 2024-08-03 11:54:31 +02:00